From e618c621b3ece7a0262ff9245027132982e6207c Mon Sep 17 00:00:00 2001 From: Lukas Hanel Date: Tue, 1 Mar 2022 17:02:31 +0100 Subject: [PATCH] feat(hikey960): define a datastore for SPMC_AT_EL3 Kinibi now has 60MB (instead of 64MB). Increase XLAT tables for BL31 Change-Id: I6843d26198a7d8bdb812e394e4482b1c35afa4c0 Signed-off-by: vallau01 Signed-off-by: Lukas Hanel --- plat/hisilicon/hikey960/hikey960_bl31_setup.c | 30 ++++++++++++++++++- plat/hisilicon/hikey960/hikey960_def.h | 7 +++-- plat/hisilicon/hikey960/include/plat.ld.S | 22 ++++++++++++++ .../hisilicon/hikey960/include/platform_def.h | 10 ++++++- plat/hisilicon/hikey960/platform.mk | 5 ++++ 5 files changed, 70 insertions(+), 4 deletions(-) create mode 100644 plat/hisilicon/hikey960/include/plat.ld.S diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c index f5f8ffed0..f39476ebf 100644 --- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -119,6 +120,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, void bl31_plat_arch_setup(void) { +#if SPMC_AT_EL3 + mmap_add_region(DDR2_SEC_BASE, DDR2_SEC_BASE, DDR2_SEC_SIZE, + MT_MEMORY | MT_RW | MT_SECURE); +#endif + hikey960_init_mmu_el3(BL31_BASE, BL31_LIMIT - BL31_BASE, BL_CODE_BASE, @@ -156,6 +162,28 @@ static void hikey960_iomcu_dma_init(void) } } +#if SPMC_AT_EL3 +/* + * On the hikey960 platform when using the EL3 SPMC implementation allocate the + * datastore for tracking shared memory descriptors in the RAM2 DRAM section + * to ensure sufficient storage can be allocated. + * Provide an implementation of the accessor method to allow the datastore + * details to be retrieved by the SPMC. + * The SPMC will take care of initializing the memory region. + */ + +#define SPMC_SHARED_MEMORY_OBJ_SIZE (512 * 1024) + +__section("ram2_region") uint8_t plat_spmc_shmem_datastore[SPMC_SHARED_MEMORY_OBJ_SIZE]; + +int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size) +{ + *datastore = plat_spmc_shmem_datastore; + *size = SPMC_SHARED_MEMORY_OBJ_SIZE; + return 0; +} +#endif + void bl31_platform_setup(void) { /* Initialize the GIC driver, cpu and distributor interfaces */ diff --git a/plat/hisilicon/hikey960/hikey960_def.h b/plat/hisilicon/hikey960/hikey960_def.h index 69a67d5b2..38d96c206 100644 --- a/plat/hisilicon/hikey960/hikey960_def.h +++ b/plat/hisilicon/hikey960/hikey960_def.h @@ -24,13 +24,16 @@ * DDR for TEE (80MB from 0x3E00000-0x43000FFF) is divided into several * regions: * - SPMC manifest (4KB at the top) used by SPMC_AT_EL3 and the TEE - * - Secure DDR (default is the top 64MB) used by OP-TEE + * - Datastore for SPMC_AT_EL3 (4MB at the top) used by BL31 + * - Secure DDR (default is the top 60MB) used by OP-TEE * - Non-secure DDR used by OP-TEE (shared memory and padding) (4MB) * - Secure DDR (4MB aligned on 4MB) for OP-TEE's "Secure Data Path" feature * - Non-secure DDR (8MB) reserved for OP-TEE's future use */ -#define DDR_SEC_SIZE 0x04000000 /* reserve 64MB secure memory */ +#define DDR_SEC_SIZE 0x03C00000 /* reserve 60MB secure memory */ #define DDR_SEC_BASE 0x3F000000 +#define DDR2_SEC_SIZE 0x00400000 /* SPMC_AT_EL3: 4MB for BL31 RAM2 */ +#define DDR2_SEC_BASE 0x42C00000 #define DDR_SEC_CONFIG_SIZE 0x00001000 /* SPMC_AT_EL3: SPMC manifest */ #define DDR_SEC_CONFIG_BASE 0x43000000 diff --git a/plat/hisilicon/hikey960/include/plat.ld.S b/plat/hisilicon/hikey960/include/plat.ld.S new file mode 100644 index 000000000..0cc25cdac --- /dev/null +++ b/plat/hisilicon/hikey960/include/plat.ld.S @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef PLAT_LD_S +#define PLAT_LD_S + +#include + +MEMORY { + RAM2 (rw): ORIGIN = DDR2_SEC_BASE, LENGTH = DDR2_SEC_SIZE +} + +SECTIONS +{ + ram2_region (NOLOAD) : { + *(ram2_region) + }>RAM2 +} + +#endif /* PLAT_LD_S */ diff --git a/plat/hisilicon/hikey960/include/platform_def.h b/plat/hisilicon/hikey960/include/platform_def.h index 43957823b..10eff011b 100644 --- a/plat/hisilicon/hikey960/include/platform_def.h +++ b/plat/hisilicon/hikey960/include/platform_def.h @@ -121,10 +121,18 @@ #define MAX_XLAT_TABLES 3 #endif -#if defined(IMAGE_BL2) || defined(IMAGE_BL31) +#if defined(IMAGE_BL2) #define MAX_XLAT_TABLES 5 #endif +#if defined(IMAGE_BL31) +#if defined(SPMC_AT_EL3) +#define MAX_XLAT_TABLES 17 +#else +#define MAX_XLAT_TABLES 5 +#endif +#endif + #define MAX_MMAP_REGIONS 16 /* diff --git a/plat/hisilicon/hikey960/platform.mk b/plat/hisilicon/hikey960/platform.mk index a256ed9af..395967b69 100644 --- a/plat/hisilicon/hikey960/platform.mk +++ b/plat/hisilicon/hikey960/platform.mk @@ -164,6 +164,11 @@ FIP_ALIGN := 512 # SPM dispatcher ifeq (${SPD},spmd) +ifeq (${SPMC_AT_EL3},1) +# Add support for platform supplied linker script for BL31 build +$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) +endif + ifeq ($(PLAT_SP_MANIFEST_DTS),) $(error "Error: A SP manifest is required for the SPMC.") endif -- 2.39.5