From d95f8f7e5fc0d4f4d6769012e82d6701118b8562 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 14 Nov 2018 23:07:21 +0200 Subject: [PATCH] drm/i915: Fix latency==0 handling for level 0 watermark on skl+ MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit If the level 0 latency is 0 we can't do anything. Return an error rather than success. While this can't happen due to WaWmMemoryReadLatency, it can happen if the user clears out the level 0 latency via debugfs. v2: Clarify how how we can end here with zero level 0 latency (Matt) Cc: Matt Roper Reviewed-by: Rodrigo Vivi Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20181114210729.16185-6-ville.syrjala@linux.intel.com Reviewed-by: Matt Roper Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_pm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 897a791662c59..d94de52a8a766 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4743,8 +4743,10 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state); uint32_t min_disp_buf_needed; - if (latency == 0 || - !intel_wm_plane_visible(cstate, intel_pstate)) { + if (latency == 0) + return level == 0 ? -EINVAL : 0; + + if (!intel_wm_plane_visible(cstate, intel_pstate)) { result->plane_en = false; return 0; } -- 2.39.5