From bfdaddf86f35fc3388a2ffff67422ba793dfa675 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 22 Jan 2015 08:48:25 +0100 Subject: [PATCH] drm/tegra: dc: Check for valid parent clock Check that the desired parent clock is indeed a valid parent for the display controller clock. This is purely cosmetic at this point since the parent clocks are specified in DT and all the currently defined parents are in fact valid parents of the display controller clock. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/dc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 1a52522f5da76..8746a9ce6a8fd 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1177,6 +1177,9 @@ int tegra_dc_state_setup_clock(struct tegra_dc *dc, { struct tegra_dc_state *state = to_dc_state(crtc_state); + if (!clk_has_parent(dc->clk, clk)) + return -EINVAL; + state->clk = clk; state->pclk = pclk; state->div = div; -- 2.39.5