From aae1c65e0aa7b80dfeb348ff1f5a3508956d9a0a Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Tue, 24 Oct 2017 23:06:52 +1000 Subject: [PATCH] powerpc/64s/radix: Fix preempt imbalance in TLB flush Fixes: 5c282c07f363 ("powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range") Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman --- arch/powerpc/mm/tlb-radix.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index b3e849c4886e6..d304028641a23 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c @@ -360,12 +360,14 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr) pid = mm ? mm->context.id : 0; + preempt_disable(); if (unlikely(pid == MMU_NO_CONTEXT)) goto no_context; /* 4k page size, just blow the world */ if (PAGE_SIZE == 0x1000) { radix__flush_all_mm(mm); + preempt_enable(); return; } -- 2.39.5