From 92a43bdf366502c6919bbd2c8e4f687c51d9738c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 8 Feb 2023 13:34:47 +0100 Subject: [PATCH] fix(versal): sync location based on IPI_ID macros IPI_ID_* macros available at include/plat_ipi.h are using PMC/APU/RPU0.. order which is not how versal_ipi_table array is composed. That's why swap APU and PMC to follow the same order as is described by macros. Change-Id: Ieaa3a967650e298e7cff45fafde0df96294c09fe Signed-off-by: Michal Simek --- plat/xilinx/versal/versal_ipi.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/plat/xilinx/versal/versal_ipi.c b/plat/xilinx/versal/versal_ipi.c index d821929a8..75d4c1436 100644 --- a/plat/xilinx/versal/versal_ipi.c +++ b/plat/xilinx/versal/versal_ipi.c @@ -20,16 +20,16 @@ /* versal ipi configuration table */ static const struct ipi_config versal_ipi_table[] = { - /* A72 IPI */ - [IPI_ID_APU] = { - .ipi_bit_mask = IPI0_TRIG_BIT, + /* PMC IPI */ + [IPI_ID_PMC] = { + .ipi_bit_mask = PMC_IPI_TRIG_BIT, .ipi_reg_base = IPI0_REG_BASE, .secure_only = 0U, }, - /* PMC IPI */ - [IPI_ID_PMC] = { - .ipi_bit_mask = PMC_IPI_TRIG_BIT, + /* A72 IPI */ + [IPI_ID_APU] = { + .ipi_bit_mask = IPI0_TRIG_BIT, .ipi_reg_base = IPI0_REG_BASE, .secure_only = 0U, }, -- 2.39.5