From 7ab89c96f64fedd40ac5fcb1accc659262cc5a48 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 15:38:25 +1000 Subject: [PATCH] drm/nouveau/secboot: pass max supported FW version to LS load funcs Will be passed to the FW loader function as an upper bound on the supported FW version to attempt to load. Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 6 +++--- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h | 4 +++- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c | 5 +++-- .../gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h | 12 ++++++++---- .../drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c | 14 ++++++++------ .../nvkm/subdev/secboot/ls_ucode_msgqueue.c | 12 +++++++----- 6 files changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index 1df09ed6fe6d8..df666fb03f5f9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -243,6 +243,7 @@ acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, enum nvkm_secboot_falcon falcon_id) { const struct nvkm_subdev *subdev = acr->base.subdev; + const struct acr_r352_ls_func *func = acr->func->ls_func[falcon_id]; struct ls_ucode_img_r352 *img; int ret; @@ -252,9 +253,8 @@ acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, img->base.falcon_id = falcon_id; - ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); - - if (ret) { + ret = func->load(sb, func->version_max, &img->base); + if (ret < 0) { kfree(img->base.ucode_data); kfree(img->base.sig); kfree(img); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h index 3d58ab8715632..f29c2268c026a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h @@ -57,12 +57,14 @@ hsf_load_header_app_size(const struct hsf_load_header *hdr, u32 app) * @lhdr_flags: LS flags */ struct acr_r352_ls_func { - int (*load)(const struct nvkm_secboot *, struct ls_ucode_img *); + int (*load)(const struct nvkm_secboot *, int maxver, + struct ls_ucode_img *); void (*generate_bl_desc)(const struct nvkm_acr *, const struct ls_ucode_img *, u64, void *); u32 bl_desc_size; int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *); u32 lhdr_flags; + int version_max; }; struct acr_r352; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c index 978ad07903670..7c2424d730838 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c @@ -111,6 +111,7 @@ acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, enum nvkm_secboot_falcon falcon_id) { const struct nvkm_subdev *subdev = acr->base.subdev; + const struct acr_r352_ls_func *func = acr->func->ls_func[falcon_id]; struct ls_ucode_img_r367 *img; int ret; @@ -120,8 +121,8 @@ acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, img->base.falcon_id = falcon_id; - ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); - if (ret) { + ret = func->load(sb, func->version_max, &img->base); + if (ret < 0) { kfree(img->base.ucode_data); kfree(img->base.sig); kfree(img); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h index 9b7c402594e80..d43f906da3a7b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h @@ -147,11 +147,15 @@ struct fw_bl_desc { u32 data_size; }; -int acr_ls_ucode_load_fecs(const struct nvkm_secboot *, struct ls_ucode_img *); -int acr_ls_ucode_load_gpccs(const struct nvkm_secboot *, struct ls_ucode_img *); -int acr_ls_ucode_load_pmu(const struct nvkm_secboot *, struct ls_ucode_img *); +int acr_ls_ucode_load_fecs(const struct nvkm_secboot *, int, + struct ls_ucode_img *); +int acr_ls_ucode_load_gpccs(const struct nvkm_secboot *, int, + struct ls_ucode_img *); +int acr_ls_ucode_load_pmu(const struct nvkm_secboot *, int, + struct ls_ucode_img *); int acr_ls_pmu_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); -int acr_ls_ucode_load_sec2(const struct nvkm_secboot *, struct ls_ucode_img *); +int acr_ls_ucode_load_sec2(const struct nvkm_secboot *, int, + struct ls_ucode_img *); int acr_ls_sec2_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index 0d71a9e40c3ea..821d3b2bdb1fa 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -90,8 +90,8 @@ ls_ucode_img_build(const struct firmware *bl, const struct firmware *code, * blob. Also generate the corresponding ucode descriptor. */ static int -ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, - const char *falcon_name) +ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, int maxver, + struct ls_ucode_img *img, const char *falcon_name) { const struct firmware *bl, *code, *data, *sig; char f[64]; @@ -146,13 +146,15 @@ error: } int -acr_ls_ucode_load_fecs(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_fecs(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { - return ls_ucode_img_load_gr(&sb->subdev, img, "fecs"); + return ls_ucode_img_load_gr(&sb->subdev, maxver, img, "fecs"); } int -acr_ls_ucode_load_gpccs(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_gpccs(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { - return ls_ucode_img_load_gr(&sb->subdev, img, "gpccs"); + return ls_ucode_img_load_gr(&sb->subdev, maxver, img, "gpccs"); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c index 5b9874619e53a..5a7a55e831a46 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c @@ -39,7 +39,7 @@ */ static int acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, - struct ls_ucode_img *img) + int maxver, struct ls_ucode_img *img) { const struct firmware *image, *desc, *sig; char f[64]; @@ -99,12 +99,13 @@ acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue, } int -acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { struct nvkm_pmu *pmu = sb->subdev.device->pmu; int ret; - ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", img); + ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", maxver, img); if (ret) return ret; @@ -136,12 +137,13 @@ acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) } int -acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { struct nvkm_sec2 *sec = sb->subdev.device->sec2; int ret; - ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", img); + ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", maxver, img); if (ret) return ret; -- 2.39.5