From 62a370276b6075bf7e88ecc20be13e89db93e38f Mon Sep 17 00:00:00 2001 From: Yongqiang Niu Date: Thu, 7 Jan 2021 11:11:11 +0800 Subject: [PATCH] dt-bindings: mediatek: add rdma-fifo-size description for mt8183 display rdma fifo size may be different even in same SOC, add this property to the corresponding rdma Signed-off-by: Yongqiang Niu Reviewed-by: Rob Herring Signed-off-by: Chun-Kuang Hu --- .../bindings/display/mediatek/mediatek,disp.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index c40f900de59d4..d6f03ad4b4752 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -66,6 +66,14 @@ Required properties (DMA function blocks): argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. +Optional properties (RDMA function blocks): +- mediatek,rdma-fifo-size: rdma fifo size may be different even in same SOC, add this + property to the corresponding rdma + the value is the Max value which defined in hardware data sheet. + mediatek,rdma-fifo-size of mt8173-rdma0 is 8K + mediatek,rdma-fifo-size of mt8183-rdma0 is 5K + mediatek,rdma-fifo-size of mt8183-rdma1 is 2K + Examples: mmsys: clock-controller@14000000 { @@ -103,6 +111,7 @@ rdma0: rdma@1400e000 { clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; mediatek,larb = <&larb0>; + mediatek,rdma-fifosize = <8192>; }; rdma1: rdma@1400f000 { -- 2.39.5