From 6001cee02c6ab2ff19b2336495cac929fe5c1f0e Mon Sep 17 00:00:00 2001 From: Manasi Navare Date: Tue, 27 Nov 2018 13:41:08 -0800 Subject: [PATCH] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit DSC specification defines linebuf_depth which contains the line buffer bit depth used to generate the bitstream. These values are defined as per Table 4.1 in DSC 1.2 spec v2 (From Manasi): * Rename as MAX_LINEBUF_DEPTH for DSC 1.1 and DSC 1.2 Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Acked-by: Sean Paul (For merging through drm-intel) Reviewed-by: Anusha Srivatsa Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-6-manasi.d.navare@intel.com --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff800..d03f1b83421a8 100644 --- a/include/drm/drm_dsc.h +++ b/include/drm/drm_dsc.h @@ -40,6 +40,9 @@ #define DSC_PPS_RC_RANGE_MINQP_SHIFT 11 #define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6 #define DSC_PPS_NATIVE_420_SHIFT 1 +#define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16 +#define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0 +#define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13 /* Configuration for a single Rate Control model range */ struct drm_dsc_rc_range_parameters { -- 2.39.5