From 5f304c87363401eb85cae304d025e93267353d3a Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Fri, 15 Apr 2016 22:32:58 +0300 Subject: [PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR The workaround added in commit c6782b76d31a ("drm/i915/gen9: Reset secondary power well requests left on by DMC/KVMR") needs to be applied on Kabylake too as shown by the corresponding timeout errors about power well 1 and MISC IO power well disabling in the latest CI run. CC: Patrik Jakobsson Signed-off-by: Imre Deak Reviewed-by: Patrik Jakobsson Link: http://patchwork.freedesktop.org/patch/msgid/1460748778-4484-1-git-send-email-imre.deak@intel.com --- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 259f66f948547..1242fb5d3301b 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, DRM_DEBUG_KMS("Disabling %s\n", power_well->name); } - if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv)) + if (IS_GEN9(dev_priv)) gen9_sanitize_power_well_requests(dev_priv, power_well); } -- 2.39.5