From 46e8bebdc47c57fe86ff2051f3d2e28fdbaf9a82 Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Fri, 31 May 2019 11:26:26 +0300 Subject: [PATCH] drm/i915/icl: Ensure port A combo PHY HW state is correct MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Make sure the HW state of the port A combo PHY is correct wrt. the IREFGEN setting. This will force a reprogramming during init or a WARN during uninit if the setting is incorrect. On my ICL RVP I haven't seen this check failing and leading to a forced reinit/WARN, but let's add it still for consistency. Cc: Ville Syrjälä Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20190531082626.30640-1-imre.deak@intel.com --- drivers/gpu/drm/i915/intel_combo_phy.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c index 98213cc587363..841708da5a569 100644 --- a/drivers/gpu/drm/i915/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/intel_combo_phy.c @@ -198,6 +198,10 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, ret = cnl_verify_procmon_ref_values(dev_priv, port); + if (port == PORT_A) + ret &= check_phy_reg(dev_priv, port, ICL_PORT_COMP_DW8(port), + IREFGEN, IREFGEN); + ret &= check_phy_reg(dev_priv, port, ICL_PORT_CL_DW5(port), CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE); -- 2.39.5