From 452451b20a5ddf85fe3607639a4f1a51ebfee07b Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Mon, 7 Mar 2022 16:31:05 +0300 Subject: [PATCH] drm/msm/adreno: fix cast in adreno_get_param() These casts need to happen before the shift. The only time it would matter would be if "rev.core" is >= 128. In that case the sign bit would be extended and we do not want that. Fixes: 9c31d0f7efdb ("drm/msm/adreno: Expose speedbin to userspace") Signed-off-by: Dan Carpenter Reviewed-by: Akhil P Oommen Link: https://lore.kernel.org/r/20220307133105.GA17534@kili Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index c91ea363c3736..9efc84929be0b 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -244,10 +244,10 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, *value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0; return 0; case MSM_PARAM_CHIP_ID: - *value = (uint64_t) adreno_gpu->rev.patchid | - (uint64_t) (adreno_gpu->rev.minor << 8) | - (uint64_t) (adreno_gpu->rev.major << 16) | - (uint64_t) (adreno_gpu->rev.core << 24); + *value = (uint64_t)adreno_gpu->rev.patchid | + ((uint64_t)adreno_gpu->rev.minor << 8) | + ((uint64_t)adreno_gpu->rev.major << 16) | + ((uint64_t)adreno_gpu->rev.core << 24); if (!adreno_gpu->info->revn) *value |= ((uint64_t) adreno_gpu->speedbin) << 32; return 0; -- 2.39.5