]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: gen7: Implement an L3 caching workaround.
authorEugeni Dodonov <eugeni.dodonov@intel.com>
Wed, 8 Feb 2012 20:53:50 +0000 (12:53 -0800)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Fri, 10 Feb 2012 22:19:10 +0000 (14:19 -0800)
commit8fd7280e0eb1c39bfa84fa3341f066ada136fb66
treeb8dbf4848dfe15d7a18fe9e75379fbd0f05dd000
parent1a98baca890daa91098e683428145b109c35eb67
drm/i915: gen7: Implement an L3 caching workaround.

This adds two cache-related workarounds for Ivy Bridge which can lead to
3D ring hangs and corruptions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c