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(parent: b4ac600) | patch
arm64: cmpxchg: patch in lse instructions when supported by the CPU
authorWill Deacon <will.deacon@arm.com>
Thu, 23 Apr 2015 19:08:49 +0000 (20:08 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 14:28:51 +0000 (15:28 +0100)
commit7a2d1f1fe5a4ed74ca503f2450ad9c8f3968174e
tree2c1de7284bb6671aa9cb4e8a0f85a119d64de3a2tree | snapshot
parentb4ac600ee54f34128df7fc46495d1a31f3a6ce2dcommit | diff
arm64: cmpxchg: patch in lse instructions when supported by the CPU

On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.

This patch introduces runtime patching of our cmpxchg primitives so that
the LSE cas instruction is used instead.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/atomic.h diff | blob | history
arch/arm64/include/asm/atomic_ll_sc.h diff | blob | history
arch/arm64/include/asm/atomic_lse.h diff | blob | history
arch/arm64/include/asm/cmpxchg.h diff | blob | history
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