]> git.baikalelectronics.ru Git - kernel.git/commit
net: hns3: add limit ets dwrr bandwidth cannot be 0
authorGuangbin Huang <huangguangbin2@huawei.com>
Tue, 19 Oct 2021 14:16:30 +0000 (22:16 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 20 Oct 2021 10:38:11 +0000 (11:38 +0100)
commit731797fdffa3d083db536e2fdd07ceb050bb40b1
treebf537ffbc6e2911ae85cf36213aafe7072a90e9b
parentb63fcaab959807282e9822e659034edf95fc8bd1
net: hns3: add limit ets dwrr bandwidth cannot be 0

If ets dwrr bandwidth of tc is set to 0, the hardware will switch to SP
mode. In this case, this tc may occupy all the tx bandwidth if it has
huge traffic, so it violates the purpose of the user setting.

To fix this problem, limit the ets dwrr bandwidth must greater than 0.

Fixes: cacde272dd00 ("net: hns3: Add hclge_dcb module for the support of DCB feature")
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c