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MIPS: Optimize TLB refill for RI/XI configurations.
authorDavid Daney <ddaney@caviumnetworks.com>
Thu, 23 Aug 2012 17:02:03 +0000 (10:02 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 11 Oct 2012 09:11:20 +0000 (11:11 +0200)
commit46a63aba859157778967a9ed48eb967b612d64df
treee7577a2a0dd354110487887703f6aa719317f691tree | snapshot
parent52e28828116f91c91dee18dd4750ddf9994509edcommit | diff
MIPS: Optimize TLB refill for RI/XI configurations.

We don't have to do a separate shift to eliminate the software bits,
just rotate them into the fill and they will be ignored.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4294/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/tlbex.c diff | blob | history
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