]> git.baikalelectronics.ru Git - kernel.git/commit
xhci: Workaround to get D3 working in Intel xHCI
authorRajmohan Mani <rajmohan.mani@intel.com>
Tue, 21 Jul 2015 14:20:26 +0000 (17:20 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Jul 2015 21:19:36 +0000 (14:19 -0700)
commit3cd126e797f9122cc4c019a4066f2f956e3c4c71
tree6b4b4edf0744156022537409896a58d00378f803
parent636232d2a0599aeef914e9931285444feeb12cc4
xhci: Workaround to get D3 working in Intel xHCI

The xHCI in Intel CherryView / Braswell Platform requires
a driver workaround to get xHCI D3 working. Without this
workaround, xHCI might not enter D3.

Workaround is to configure SSIC PORT as "unused" before D3
entry and "used" after D3 exit. This is done through a
vendor specific register (PORT2_SSIC_CONFIG_REG2 at offset
0x883c), in xhci suspend / resume callbacks.

Verified xHCI D3 works fine in CherryView / Braswell platform.

Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/host/xhci-pci.c