James Zhu [Wed, 13 Jan 2021 19:35:45 +0000 (14:35 -0500)]
drm/amdgpu: enable vcn/jpeg on yellow carp
Enable vcn/jpeg IP on yellow carp.
Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 13 Jan 2021 19:32:34 +0000 (14:32 -0500)]
drm/amdgpu/vcn: add vcn support for yellow carp
Add vcn firmware support for yellow carp
Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 13 Jan 2021 19:39:13 +0000 (14:39 -0500)]
drm/amdgpu/jpeg: Remove harvest checking on CHIP_YELLOW_CARP
Register CC_UVD_HARVESTING is obsolete on CHIP_YELLOW_CARP.
Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 13 Jan 2021 15:52:41 +0000 (23:52 +0800)]
drm/amd/pm: add vcn/jepg enable functions for yellow carp
This patch is to add vcn/jepg enable functions to power up/down them
with smu messages. VCN/JEPG are poweroff by default.
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 16 Dec 2020 09:21:27 +0000 (17:21 +0800)]
drm/amdgpu: introduce a stolen reserved buffer to protect specific buffer region (v2)
Some ASICs such as Yellow Carp needs to reserve a region of video memory
to avoid access from driver. So this patch is to introduce a stolen
reserved buffer to protect specific buffer region.
v2: free this buffer in amdgpu_ttm_fini.
Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-and-Tested-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chen Li [Fri, 4 Jun 2021 08:43:02 +0000 (16:43 +0800)]
radeon: use memcpy_to/fromio for UVD fw upload
I met a gpu addr bug recently and the kernel log
tells me the pc is memcpy/memset and link register is
radeon_uvd_resume.
As we know, in some architectures, optimized memcpy/memset
may not work well on device memory. Trival memcpy_toio/memset_io
can fix this problem.
BTW, amdgpu has already done it in:
commit ba0b2275a678 ("drm/amdgpu: use memcpy_to/fromio for UVD fw upload"),
that's why it has no this issue on the same gpu and platform.
Signed-off-by: Chen Li <chenli@uniontech.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chen Li [Fri, 4 Jun 2021 08:40:32 +0000 (16:40 +0800)]
radeon: fix coding issues reported from sparse
Also fix some coding issues reported from sparse.
Signed-off-by: Chen Li <chenli@uniontech.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wan Jiabing [Thu, 3 Jun 2021 03:28:59 +0000 (11:28 +0800)]
drm: amdgpu: Remove unneeded semicolon in amdgpu_vm.c
Fix following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1726:2-3: Unneeded semicolon
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
by explicitly adding a break statement instead of letting the code fall
through to the next case.
Link: https://github.com/KSPP/linux/issues/115 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Wed, 2 Jun 2021 19:05:20 +0000 (15:05 -0400)]
drm/amdgpu: Don't flush/invalidate HDP for APUs and A+A
Integrate two generic functions to determine if HDP
flush is needed for all Asics.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Kleiner [Wed, 2 Jun 2021 20:45:56 +0000 (22:45 +0200)]
drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.
Testing on AMD Carizzo with DCE-11.0 display engine showed that
it doesn't like a 36 bpp linebuffer very much. The display just
showed a solid green.
Testing on RavenRidge DCN-1.0, Polaris11 with DCE-11.2 and Kabini
with DCE-8.3 did not expose any problems, so for now only revert
to 30 bpp linebuffer depth on asics with DCE-11.0 display engine.
Fixes: a316db72096044 ("drm/amd/display: Increase linebuffer pixel depth to 36bpp.") Reported-by: Tom StDenis <Tom.StDenis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yu Kuai [Thu, 3 Jun 2021 11:30:51 +0000 (19:30 +0800)]
drm: fix doc warnings in drm_atomic.h
Add description for parameters for
for_each_new_plane_in_state_reverse to fix warnings:
include/drm/drm_atomic.h:908: warning: Function parameter or member '__state' not described in 'for_each_new_plane_in_state_reverse'
include/drm/drm_atomic.h:908: warning: Function parameter or member 'plane' not described in 'for_each_new_plane_in_state_reverse'
include/drm/drm_atomic.h:908: warning: Function parameter or member 'new_plane_state' not described in 'for_each_new_plane_in_state_reverse'
include/drm/drm_atomic.h:908: warning: Function parameter or member '__i' not described in 'for_each_new_plane_in_state_reverse'
Fixes: a6c3c37b661d ("drm/amd/display: fix gcc set but not used warning of variable 'old_plane_state'") Signed-off-by: Yu Kuai <yukuai3@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Thu, 3 Jun 2021 12:42:31 +0000 (13:42 +0100)]
drm/amd/display: remove variable active_disp
The variable active_disp is being initialized with a value that
is never read, it is being re-assigned immediately afterwards.
Clean up the code by removing the need for variable active_disp.
Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Thu, 3 Jun 2021 12:34:40 +0000 (13:34 +0100)]
drm/amdgpu: remove redundant assignment of variable k
The variable k is being assigned a value that is never read, the
assignment is redundant and can be removed.
Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 1 Jun 2021 22:54:32 +0000 (18:54 -0400)]
drm/amdkfd: Make TLB flush conditional on mapping
It is to optimize memory mapping latency, and also aviod
a page fault in a corner case of changing valid PDE into
PTE.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 1 Jun 2021 22:36:34 +0000 (18:36 -0400)]
drm/amdgpu: Add table_freed parameter to amdgpu_vm_bo_update
It is to pass the flag to KFD, and optimize table_freed in
amdgpu_vm_bo_update_mapping.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 1 Jun 2021 22:26:07 +0000 (18:26 -0400)]
drm/amdkfd: Add heavy-weight TLB flush after unmapping
It is a part of memory mapping optimization.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 1 Jun 2021 22:19:42 +0000 (18:19 -0400)]
drm/amdkfd: Add flush-type parameter to kfd_flush_tlb
It is to provide more tlb flush types option for different
case scenario.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Wed, 2 Jun 2021 09:53:05 +0000 (11:53 +0200)]
drm/amdgpu: Use drm_dbg_kms for reporting failure to get a GEM FB
drm_err meant broken user space could spam dmesg.
Fixes: f258907fdd835e "drm/amdgpu: Verify bo size can fit framebuffer size on init." Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Changfeng <Changfeng.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sathishkumar S [Sun, 30 May 2021 04:15:26 +0000 (09:45 +0530)]
drm/amd/pm: sysfs attrs to read ss powershare (v6)
add sysfs attrs to read smartshift APU and DGPU power share.
document the sysfs device attributes.
V2: change variable/macro name for stapm power limit (Lijo)
V3: files to be exposed as sysfs device attributes (Alex)
V4: check ret value of sysfs create and remove only if created.
V5: add ss attrs in amdgpu_device_attrs and use attr_update (Lijo)
V6: all checks for ss support to be in if else if statements. (Lijo)
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Thu, 3 Jun 2021 20:13:56 +0000 (06:13 +1000)]
Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.14-2021-06-02:
amdgpu:
- GC/MM register access macro clean up for SR-IOV
- Beige Goby updates
- W=1 Fixes
- Aldebaran fixes
- Misc display fixes
- ACPI ATCS/ATIF handling rework
- SR-IOV fixes
- RAS fixes
- 16bpc fixed point format support
- Initial smartshift support
- RV/PCO power tuning fixes for suspend/resume
- More buffer object subclassing work
- Add new INFO query for additional vbios information
- Add new placement for preemptable SG buffers
amdkfd:
- Misc fixes
radeon:
- W=1 Fixes
- Misc cleanups
UAPI:
- Add new INFO query for additional vbios information
Useful for debugging vbios related issues. Proposed umr patch:
https://patchwork.freedesktop.org/patch/433297/
- 16bpc fixed point format support
IGT test:
https://lists.freedesktop.org/archives/igt-dev/2021-May/031507.html
Proposed Vulkan patch:
https://github.com/kleinerm/pal/commit/a25d4802074b13a8d5f7edc96ae45469ecbac3c4
- Add a new GEM flag which is only used internally in the kernel driver. Userspace
is not allowed to set it.
Dave Airlie [Wed, 2 Jun 2021 04:04:29 +0000 (14:04 +1000)]
Merge tag 'drm-intel-gt-next-2021-05-28' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes:
- Add reworked uAPI for DG1 behind CONFIG_BROKEN (Matt A, Abdiel)
Driver Changes:
- Fix for Gitlab issues #3293 and #3450:
Avoid kernel crash on older L-shape memory machines
- Add Wa_14010733141 (VDBox SFC reset) for Gen11+ (Aditya)
- Fix crash in auto_retire active retire callback due to
misalignment (Stephane)
- Fix overlay active retire callback alignment (Tvrtko)
- Eliminate need to align active retire callbacks (Matt A, Ville,
Daniel)
- Program FF_MODE2 tuning value for all Gen12 platforms (Caz)
- Add Wa_14011060649 for TGL,RKL,DG1 and ADLS (Swathi)
- Create stolen memory region from local memory on DG1 (CQ)
- Place PD in LMEM on dGFX (Matt A)
- Use WC when default state object is allocated in LMEM (Venkata)
- Determine the coherent map type based on object location (Venkata)
- Use lmem physical addresses for fb_mmap() on discrete (Mohammed)
- Bypass aperture on fbdev when LMEM is available (Anusha)
- Return error value when displayable BO not in LMEM for dGFX (Mohammed)
- Do release kernel context if breadcrumb measure fails (Janusz)
- Hide modparams for compiled-out features (Tvrtko)
- Apply Wa_22010271021 for all Gen11 platforms (Caz)
- Fix unlikely ref count race in arming the watchdog timer (Tvrtko)
- Check actual RC6 enable status in PMU (Tvrtko)
- Fix a double free in gen8_preallocate_top_level_pdp (Lv)
- Use trylock in shrinker for GGTT on BSW VT-d and BXT (Maarten)
- Remove erroneous i915_is_ggtt check for
I915_GEM_OBJECT_UNBIND_VM_TRYLOCK (Maarten)
- Convert uAPI headers to real kerneldoc (Matt A)
- Clean up kerneldoc warnings headers (Matt A, Maarten)
- Fail driver if LMEM training failed (Matt R)
- Avoid div-by-zero on Gen2 (Ville)
- Read C0DRB3/C1DRB3 as 16 bits again and add _BW suffix (Ville)
- Remove reference to struct drm_device.pdev (Thomas)
- Increase separation between GuC and execlists code (Chris, Matt B)
- Use might_alloc() (Bernard)
- Split DGFX_FEATURES from GEN12_FEATURES (Lucas)
- Deduplicate Wa_22010271021 programming on (Jose)
- Drop duplicate WaDisable4x2SubspanOptimization:hsw (Tvrtko)
- Selftest improvements (Chris, Hsin-Yi, Tvrtko)
- Shuffle around init_memory_region for stolen (Matt)
- Typo fixes (wengjianfeng)
Jiansong Chen [Thu, 13 May 2021 02:56:50 +0000 (10:56 +0800)]
drm/amdgpu: remove unsafe optimization to drop preamble ib
Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.
Add AMDGPU_INFO_VBIOS_INFO subquery id for detailed vbios info.
Provides a way for the user application to get the VBIOS
information without having to parse the binary.
It is useful for the user to be able to display in a simple way the VBIOS
version in their system if they happen to encounter an issue.
V2:
Use numeric serial.
Parse and expose vbios version string.
V3:
Remove redundant data in drm_amdgpu_info_vbios struct.
V4:
64 bit alignment in drm_amdgpu_info_vbios.
v5: squash together all the reverts, etc. (Alex)
Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 1 Jun 2021 13:55:13 +0000 (09:55 -0400)]
drm/amdgpu: bump driver version
For 16bpc display support.
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Baokun Li [Tue, 1 Jun 2021 08:14:00 +0000 (16:14 +0800)]
drm/amd/display: fix warning: ‘update_dsc_caps’ and ‘apply_dsc_policy_for_stream’ defined but not used
Fixes gcc '-Wunused-function' warning:
‘update_dsc_caps’ and ‘apply_dsc_policy_for_stream’ are only used
if 'CONFIG_DRM_AMD_DC_DCN' is defined,
however, it's defined even if 'CONFIG_DRM_AMD_DC_DCN' is not defined.
Thus gcc will report following warning
if 'CONFIG_DRM_AMD_DC_DCN' is not defined:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5572:13: warning:
‘apply_dsc_policy_for_stream’ defined but not used [-Wunused-function]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5556:13: warning:
‘update_dsc_caps’ defined but not used [-Wunused-function]
Thus move the definition of ‘update_dsc_caps’ and
‘apply_dsc_policy_for_stream’ inside define macro to fix it.
Signed-off-by: Baokun Li <libaokun1@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaokun Zhang [Mon, 31 May 2021 09:30:06 +0000 (17:30 +0800)]
drm/amd/display: Remove the redundant initialization of local variable
Local variable 'i' and 'j' will be initialized in the for loop, so
remove the redundant initialization.
Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yu Kuai [Sat, 29 May 2021 09:28:16 +0000 (17:28 +0800)]
drm/amd/display: fix gcc set but not used warning of variable 'old_plane_state'
define a new macro for_each_new_plane_in_state_reverse to replace
for_each_oldnew_plane_in_state_reverse, so that the unused variable
'old_plane_state' can be removed.
Fix gcc warning:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:10066:26: warning:
variable ‘old_plane_state’ set but not used [-Wunused-but-set-variable]
Signed-off-by: Yu Kuai <yukuai3@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kees Cook [Fri, 28 May 2021 17:53:54 +0000 (10:53 -0700)]
drm/amd/display: Avoid HDCP over-read and corruption
Instead of reading the desired 5 bytes of the actual target field,
the code was reading 8. This could result in a corrupted value if the
trailing 3 bytes were non-zero, so instead use an appropriately sized
and zero-initialized bounce buffer, and read only 5 bytes before casting
to u64.
Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jiapeng Chong [Fri, 28 May 2021 09:29:18 +0000 (17:29 +0800)]
amdgpu: remove unreachable code
In the function amdgpu_uvd_cs_msg(), every branch in the switch
statement will have a return, so the code below the switch statement
will not be executed.
Simon Ser [Wed, 26 May 2021 13:55:50 +0000 (13:55 +0000)]
amd/display: convert DRM_DEBUG_ATOMIC to drm_dbg_atomic
This allows to tie the log message to a specific DRM device.
Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Sat, 29 May 2021 22:34:20 +0000 (18:34 -0400)]
drm/amdgpu: Fix a bug on flag table_freed
table_freed will be always true when mapping a memory with size
bigger than 2MB. The problem is page table's entries are always
existed, but existing mapping depends on page talbe's bo, so
using a check of page table's bo existed will resolve the issue.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Mon, 31 May 2021 09:29:11 +0000 (17:29 +0800)]
drm/amdgpu: fix sdma firmware version error in sriov
Re-adjust the function return order to avoid empty sdma version in the
sriov environment. (read amdgpu_firmware_info)
Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sathishkumar S [Wed, 26 May 2021 10:36:19 +0000 (16:06 +0530)]
drm/amdgpu: enable smart shift on dGPU (v5)
enable smart shift on dGPU if it is part of HG system and
the platform supports ATCS method to handle power shift.
V2: avoid psc updates in baco enter and exit (Lijo)
fix alignment (Shashank)
V3: rebased on unified ATCS handling. (Alex)
V4: check for return value and warn on failed update (Shashank)
return 0 if device does not support smart shift. (Lizo)
V5: rebased on ATPX/ATCS structures global (Alex)
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Fri, 28 May 2021 14:35:27 +0000 (16:35 +0200)]
drm/amdgpu: flush gart changes after all BO recovery
Don't flush gart changes after recovering each BO instead
do it after recovering all the BOs. Flishing gart also needed
for amdgpu_ttm_alloc_gart().
v4: use containerof to retrieve adev struct.
v3: rename amdgpu_gart_tlb_flush() -> amdgpu_gart_invalidate_tlb().
v2: abstract out gart tlb flushing logic to amdgpu_gart.c
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Fri, 28 May 2021 10:32:16 +0000 (12:32 +0200)]
drm/amdgpu: do not allocate entries separately
Allocate PD/PT entries while allocating VM BOs and use that
instead of allocating those entries separately.
v2: create a new var for num entries.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Tue, 25 May 2021 19:09:48 +0000 (21:09 +0200)]
drm/amdgpu: remove unused code
Remove unused code related to shadow BO.
v2: removing shadow bo ptr from base class.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Thu, 20 May 2021 12:10:24 +0000 (14:10 +0200)]
drm/amdgpu: switch to amdgpu_bo_vm for vm code
The subclass, amdgpu_bo_vm is intended for PT/PD BOs which are also
shadowed, so switch to amdgpu_bo_vm BO for PT/PD BOs.
v4: update amdgpu_vm_update_funcs to accept amdgpu_bo_vm.
v3: simplify code.
check also if shadow bo exist instead of checking bo only type.
v2: squash three related patches.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Wed, 26 May 2021 16:18:40 +0000 (18:18 +0200)]
drm/admgpu: add two shadow BO helper functions
Add amdgpu_bo_add_to_shadow_list() to handle shadow list
additions and amdgpu_bo_shadowed() to check if a BO is shadowed.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Tue, 25 May 2021 18:46:08 +0000 (20:46 +0200)]
drm/amdgpu: move shadow bo validation to VM code
Do the shadow bo validation in the VM code as
VM code knows/owns shadow BOs.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Tue, 4 May 2021 12:08:29 +0000 (14:08 +0200)]
drm/amdgpu: add amdgpu_bo_vm bo type
Add new BO subclass that will be used by amdgpu vm code.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Fri, 28 May 2021 14:54:16 +0000 (16:54 +0200)]
drm/amdgpu: make sure we unpin the UVD BO
Releasing pinned BOs is illegal now. UVD 6 was missing from:
commit 2f40801dc553 ("drm/amdgpu: make sure we unpin the UVD BO")
Fixes: 2f40801dc553 ("drm/amdgpu: make sure we unpin the UVD BO") Cc: stable@vger.kernel.org Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojian Du [Tue, 25 May 2021 10:29:53 +0000 (18:29 +0800)]
drm/amd/pm: retain the fine grain tuning parameters after resume
This patch is to retain the fine grain tuning parameters after resume for
legacy APU, it will cover Raven/Raven2/Picasso.
Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Thu, 27 May 2021 12:13:04 +0000 (14:13 +0200)]
drm/amd/display: WARN_ON cleanups
Use WARN_ON() inside if-condition when possible.
v2: Squash in coding style fix (Alex)
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/nouveau: Implement mmap as GEM object function
* drm/radeon: Implement mmap as GEM object function
* drm/rockchip: Remove generic drivers during init; Add scaling for RK3036
win1; Fix missing registers for RK3066 and 3188; Add alpha support for
RK3036, RK3066, RK3126 and RK3188; Fixes and cleanups
* drm/simpledrm: Use %p4cc: format-string modifier
Nirmoy Das [Thu, 27 May 2021 12:03:33 +0000 (14:03 +0200)]
drm/amd/display: do not dereference on NULL
WARN_ON() will not kill the process so the second WARN_ON()
will try to dereference NULL pointer.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sathishkumar S [Mon, 10 May 2021 14:00:23 +0000 (19:30 +0530)]
drm/amdgpu: support atcs method powershift (v4)
add support to handle ATCS method for power shift control.
used to communicate dGPU device state to SBIOS.
V2: use defined acpi func for checking psc support (Lijo)
fix alignment (Shashank)
V3: rebased on unified ATCS handling (Alex)
V4: rebased on ATPX/ATCS structures global (Alex)
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shiwu Zhang [Wed, 26 May 2021 03:42:14 +0000 (11:42 +0800)]
drm/amdgpu: free the metadata buffer for sg type BOs as well
Since both sg and device type BOs have metadata buffer, free
the buffer in both cases when to destroy BOs
Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Acked-by: Nirmoy Das <Nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>