T Karthik Reddy [Wed, 30 Mar 2022 09:07:56 +0000 (11:07 +0200)]
gpio: slg7xl45106: Update gpio desc flags from DT
In current slg7xl45106 gpio driver xlate() function we are not updating
gpio flags from DT. Read the given flag from DT and update the gpio desc
flags variable with required gpio direction state.
T Karthik Reddy [Wed, 30 Mar 2022 09:07:55 +0000 (11:07 +0200)]
net: zynq_gem: Move ethernet info print statement
As we are not reading the PHY address in case of CONFIG_ETH_PHY in plat
function, phy address always prints as -1. So move the ethernet info
print statement to probe function, to display proper phy address.
T Karthik Reddy [Wed, 30 Mar 2022 09:07:54 +0000 (11:07 +0200)]
net: phy: Avoid phy gpio reset sequence if DM_ETH_PHY is enabled
If DM_ETH_PHY config is enabled PHY gpio reset is taken care by the
eth-phy-uclass driver, so use the PHY gpio reset functionality from
ethernet_id file when this config is disabled to reset the PHY.
Use debug() print instead of dev_err() to avoid warning incase if phy-id
compatible string is not present.
Michal Simek [Wed, 30 Mar 2022 09:07:53 +0000 (11:07 +0200)]
net: zynq_gem: Use shared MDIO bus support for zynqmp
CONFIG_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet.
T Karthik Reddy [Tue, 29 Mar 2022 14:05:57 +0000 (16:05 +0200)]
net: phy: Fix rgmii-id phy reset timeout issue
While creating a phy device using phy_device_create(), we need to
provide a valid phyaddr instead of 0 causing phy address being
registered as 0 with mdio bus and shows mdio phy list as below
ZynqMP> mdio list
eth0:
0 - TI DP83867 <--> ethernet@ff0b0000
eth1:
0 - TI DP83867 <--> ethernet@ff0c0000
Also PHY soft reset is being requested on 0 instead of valid
address causing "PHY reset timed out" error.
So add phyaddr argument to phy_connect_phy_id() and to its prototype
to create phy device with valid phyaddress.
Michal Simek [Fri, 15 Oct 2021 13:17:29 +0000 (15:17 +0200)]
pwm: Add driver for cadence TTC
TTC has three modes of operations. Timer, PWM and input counters.
There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600
The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and
200 MHz. When user select SD frequency as 200MHz in the design, the
actual frequency is going to come around ~187MHz (<= 200MHz considering
the parent clock and divisor selection). We need to set SDx_BASECLK as
200 in this case, setting 187 will result in tuning failures in mmc.
Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency
range.
Michal Simek [Fri, 25 Mar 2022 10:50:07 +0000 (11:50 +0100)]
serial: zynq: Change fifo behavior in debug mode
Serial IP has output buffer which status is indicated by two bits. If fifo
if empty or full. Default configuration is that chars are pushed to fifo
till it is full. Time to time it is visible that chars are scambled and
logs are not visible. Not sure what it is exactly happening but all the
time it helps to change driver behavior to write only one char at a time.
That's why enable this mode when debug uart is enabled not to see scrambled
chars in debug by default.
Michal Simek [Thu, 24 Mar 2022 12:31:26 +0000 (13:31 +0100)]
arm64: zynqmp: Remove low level UART setting cont
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
The same change was done in past by commit ad627a7bebf3 ("arm64: zynqmp:
Remove low level UART setting").
Michal Simek [Thu, 24 Mar 2022 09:17:51 +0000 (10:17 +0100)]
dt-bindings: phy: Sync phy.h with Linux kernel
Make sure that both files are in sync to have the same values in DTs.
The patch is fixing SPDX license as is used in the kernel and adding new
values for PHY_TYPE_DPHY and PHY_TYPE_CPHY.
Michal Simek [Thu, 17 Mar 2022 14:25:31 +0000 (15:25 +0100)]
arm64: versal: Do not place u-boot to reserved memory location
Versal can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in ZynqMP by commit 043ef21b4b64 ("zynqmp: Do not place u-boot to reserved memory location")
and also for microblaze by commit 877dd4c0c0ed ("microblaze: Do not place
u-boot to reserved memory location").
The patch was tested by adding reserved-memory node to DT and check via
bdinfo back.
Simon Glass [Sun, 23 Jan 2022 14:04:08 +0000 (07:04 -0700)]
video: Drop references to CONFIG_VIDEO et al
Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.
Also drop the prototype for video_get_info_str() which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Han Xu [Fri, 25 Mar 2022 13:36:38 +0000 (08:36 -0500)]
mtd: gpmi: fix the bch setting backward compatible issue
Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.
Fixes: 9675a86c0b (mtd: gpmi: provide the option to use legacy bch geometry) Fixes: 5045027531 (mtd: gpmi: change the BCH layout setting for large oob NAND) Tested-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Signed-off-by: Han Xu <han.xu@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Mark Kettenis [Mon, 21 Mar 2022 21:41:18 +0000 (22:41 +0100)]
arm: apple: Fix mem layout
The current approach for setting the environment variables that
describe the memory layout runs the risk of overlapping with
reserved memory regions. Use the lmb code to derive the addresses
for these variables instead.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Up to now the initrddump.efi application has drained the input after
showing the prompt. This works for humans but leads to problems when
automating testing. If the input is drained, this should be done before
showing the prompt.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_loader: nocolor command line attr for initrddump.efi
initrddump.efi uses colored output and clear the screen. This is not
helpful for integration into Python tests. Allow specifying 'nocolor' in
the load option data to suppress color output and clearing the screen.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Andre Przywara [Tue, 15 Mar 2022 23:20:54 +0000 (23:20 +0000)]
sunxi: dts: Update RGMII phy-mode properties
Commit a24fed01fe99 ("net: phy: realtek: Add tx/rx delay config for
8211e") made the Realtek PHY driver honour the phy-mode DT property,
to set up the proper delay scheme for the RX and TX lines. A similar
change in the kernel revealed that those properties were mostly wrong.
The kernel DTs got updated over the last few months, but we were missing
out on the U-Boot version.
Just sync in the phy-mode properties from the mainline kernel,
v5.17-rc7, to avoid the breaking DT sync that late in the cycle.
This fixes Ethernet operation on the affected boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
Andre Przywara [Tue, 15 Mar 2022 00:00:53 +0000 (00:00 +0000)]
sunxi: Fix old GMAC pinmux setup
Commit db9a2b7c1a93 ("sunxi: move non-essential code out of s_init()")
moved the call to eth_init_board() from s_init() into board_init_f().
This means it's now only called from the SPL, which makes sense for
most of the other moved low-level functions. However the GMAC pinmux and
clock setup in eth_init_board() was not happy about that, so it broke
the sun7i GMAC.
Since Ethernet is of no use in the SPL anyway, just move the call into
board_init(), which is only run in U-Boot proper.
This fixes Ethernet operation for the A20 SoCs, which broke in
v2022.04-rc1, with the above mentioned commit.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2]
Billy Tsai [Tue, 8 Mar 2022 03:04:07 +0000 (11:04 +0800)]
ARM: dts: ast2600: Add PWM to device tree
Add the PWM node and enable it for AST2600 EVB
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Billy Tsai [Tue, 8 Mar 2022 03:04:06 +0000 (11:04 +0800)]
pinctrl: Add the pinctrl setting for PWM.
This patchs add the signal description array for PWM pinctrl settings.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Billy Tsai [Tue, 8 Mar 2022 03:04:05 +0000 (11:04 +0800)]
pwm: Add Aspeed ast2600 PWM support
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Pali Rohár [Fri, 18 Feb 2022 12:16:19 +0000 (13:16 +0100)]
pci: Remove duplicate PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* macros
Macros PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* are unused and are
duplication of PCI_CLASS_* macros defined in pci_ids.h header file.
So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 18 Feb 2022 12:16:18 +0000 (13:16 +0100)]
sandbox: video: Replace PCI_CLASS_* macros by one from pci_ids.h
Replace old macros PCI_CLASS_CODE_COMM and PCI_CLASS_SUB_CODE_COMM_SERIAL
by new macros defined in pci_ids.h. Old macros would be deleted in followup
commit.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Sean Anderson [Tue, 22 Feb 2022 17:19:25 +0000 (12:19 -0500)]
Add option to use -Og
This adds support for using -Og when building U-Boot. According to the
gcc man page:
> -Og should be the optimization level of choice for the standard
> edit-compile-debug cycle, offering a reasonable level of optimization
> while maintaining fast compilation and a good debugging experience.
This optimization level is roughly -O1 minus a few additional
optimizations. It provides a noticably better debugging experience, with
many fewer variables <optimized out>.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Tue, 22 Feb 2022 17:19:24 +0000 (12:19 -0500)]
Split CONFIG_CC_OPTIMIZE_FOR_SIZE into two configs
This adds a separate CONFIG_CC_OPTIMIZE_FOR_SPEED option in a choice,
in preparation for adding another optimization option. Also convert SH's
makefile to use this new option.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Wed, 23 Mar 2022 16:19:42 +0000 (17:19 +0100)]
arm: a37xx: espressobin: Fix non-working SPI
Commit 3fc8dc735f22 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke SPI support on some Espressobin boards and results in
following U-Boot error:
Loading Environment from SPIFlash... jedec_spi_nor flash@0: unrecognized JEDEC id bytes: f7, 30, 0b
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
Before that commit DT node for SPI was called 'spi-flash@0' and after
that commit it is called 'flash@0'. Before that commit 'spi-max-frequency'
was set to 50000000 and after it is 104000000.
Rename DT node 'spi-flash@0 in armada-3720-espressobin-u-boot.dtsi to
'flash@0' and set custom U-Boot 'spi-max-frequency' back to 50000000.
With this change SPI is working on Espressobin again and it is detected
with JEDEC ids ef, 60, 16 on our tested unit.
Loading Environment from SPIFlash... SF: Detected w25q32dw with page size 256 Bytes, erase size 4 KiB, total 4 MiB
OK
Note that it is unknown why spi-max-frequency with value 104000000 does not
work in U-Boot as it works fine with Linux kernel. Also note that in
defconfig file configs/mvebu_espressobin-88f3720_defconfig is set option
CONFIG_SF_DEFAULT_SPEED=40000000 which is different value than in DT.
Fixes: 3fc8dc735f22 ("arm: a37xx: Update DTS files to version from upstream Linux kernel") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 22 Mar 2022 16:17:59 +0000 (17:17 +0100)]
arm: mvebu: dts: turris_mox: fix non-working USB port
Commit 3fc8dc735f22 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke USB port on Turris MOX, because in Linux' DTS the bus
voltage supply is described as a `phy-supply` property of connector
node, a mechanism that is not supported in U-Boot yet.
For now, fix this by adding `vbus-supply` to usb3 node.
Fixes: 3fc8dc735f22 ("arm: a37xx: Update DTS files to version from upstream Linux kernel") Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Vasut [Wed, 16 Feb 2022 14:27:59 +0000 (15:27 +0100)]
cmd: eeprom: Do not rewrite EEPROM I2C bus with DM I2C enabled
With DM I2C, the EEPROM bus has been correctly configured in
eeprom_execute_command() already. Do not reconfigure it here
with hard-coded bus number again.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
This patch replaces use fdtdec_get_addr with simpler dev_read_addr().
fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although
not confirmed, it could be related to the fact, that quoting the documentation,
"This variant hard-codes the number of cells used to represent the address and
size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)".
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tom Rini [Sun, 20 Mar 2022 19:14:59 +0000 (15:14 -0400)]
Merge tag 'efi-2022-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc5
Documentation:
* Fix documentation of FIP creation for Amlogic boards
* Update Nokia RX-51 QEMU documentation
* Add Raspberry Pi documentation
UEFI:
* Fix booting via short form device paths
* Support short form device paths in 'efidebug boot add'
* Fix ESP detection for capsule updates
* Allow ACPI table usage even if device-tree exists - ignore DT
* OP-TEE based GetVariable(): return attributes when buffer too small
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