Mario Six [Mon, 21 Jan 2019 08:17:58 +0000 (09:17 +0100)]
mpc83xx: Migrate LBLAW_* to Kconfig
The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Mario Six [Mon, 21 Jan 2019 08:17:57 +0000 (09:17 +0100)]
mpc83xx: Migrate BATS config to Kconfig
The BATs (block address translation registers) determine the initial
memory window mappings. Hence, they must be known at compile time and
cannot be implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Mario Six [Mon, 21 Jan 2019 08:17:55 +0000 (09:17 +0100)]
mpc83xx: pcie: Read the clock from registers
The MPC83xx DM timer driver disables arch.pciexp*_clk, and uses
clk_get_rate instead. But the legacy MPC83xx PCIe driver still uses
arch.pciexp*_clk for the clock.
Hence, read the PCIe clock from the registers in the legacy MPC83xx PCIe
driver.
Mario Six [Mon, 21 Jan 2019 08:17:54 +0000 (09:17 +0100)]
mpc83xx: Kconfig: Migrate HRCW to Kconfig
The HRCW (hardware reset configuration word) is a constant that must be
hard-coded into the boot loader image. So, it must be available at
compile time, and cannot be migrated to the DT mechanism, but has to be
kept in Kconfig.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Mario Six [Mon, 21 Jan 2019 08:17:53 +0000 (09:17 +0100)]
mpc83xx: Get rid of CONFIG_83XX_CLKIN
MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the
system clock. To migrate the architecture, we can replace
CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ.
To do this
* replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ
* set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all
MPC83xx config files
Mario Six [Mon, 21 Jan 2019 08:17:52 +0000 (09:17 +0100)]
mpc83xx: Replace CONFIG_83XX_CLKIN in calculations
CONFIG_SYS_CLK_FREQ is the standard way to set the system clock
frequency. On MPC83xx, CONFIG_83XX_CLKIN is used for this purpose.
Hence, the obvious way is to replace CONFIG_83XX_CLKIN with
CONFIG_SYS_CLK_FREQ.
A few MPC83xx boards use the CONFIG_83XX_CLKIN variable for computing
CONFIG_SYS_NS16550_CLK. This makes it harder to replace
CONFIG_83XX_CLKIN.
But the value of the multiplicator can be read from the SPMR register.
Hence, replace the static calculations with a call to a new get_bus_freq
function, as other architectures do.
Mario Six [Mon, 21 Jan 2019 08:17:42 +0000 (09:17 +0100)]
ve8313: Merge BR/OR settings
The ve8313 has the option of either configuring the eLBC (enhanced local system bus) such that
* NOR flash is the first memory bank, and NAND flash is the second memory bank, or
* NAND flash is the first memory bank, and NOR flash is the second memory bank,
by using CONFIG_SYS_NOR_{BR,OR}_PRELIM and
CONFIG_SYS_NAND_{BR,OR}_PRELIM for defining
CONFIG_SYS_{BR,OR}{0,1}_PRELIM.
After Kconfig migration, replacing some lines in the defconfig will have
the same effect.
Hence, we will not create distinct ve8313_{NOR,NAND} configs for such a
small change.
Instead, fix the current default (NOR first, NAND second), and unroll
the CONFIG_SYS_NAND_{BR,OR}_PRELIM options. This will ease the Kconfig
migration
Mario Six [Mon, 21 Jan 2019 08:17:41 +0000 (09:17 +0100)]
mpc8315erdb: Merge BR/OR settings
The mpc8315erdb has the option of either configuring the eLBC (enhanced
local system bus) such that
* NOR flash is the first memory bank, and NAND flash is the second
memory bank, or
* NAND flash is the first memory bank, and NOR flash is the second
memory bank,
by using CONFIG_SYS_NOR_{BR,OR}_PRELIM and
CONFIG_SYS_NAND_{BR,OR}_PRELIM for defining
CONFIG_SYS_{BR,OR}{0,1}_PRELIM.
After Kconfig migration, replacing some lines in the defconfig will have
the same effect.
Hence, we will not create distinct ve8313_{NOR,NAND} configs for such a small change.
Instead, fix the current default (NOR first, NAND second), and unroll
the CONFIG_SYS_NAND_{BR,OR}_PRELIM options. This will ease the Kconfig
migration.
Mario Six [Mon, 21 Jan 2019 08:17:40 +0000 (09:17 +0100)]
mpc83xx: Make distinct MPC8349EMDS_SDRAM board
The MPC8349EMDS config file contains config options to enable SDRAM
support. To keep this ability after the Kconfig migration, create a new
MPC8349EMDS_SDRAM board that enables the SDRAM support and remove the
SDRAM support from the original board.
Mario Six [Mon, 21 Jan 2019 08:17:39 +0000 (09:17 +0100)]
powerpc: Add LSDMR config values
The LSDMR_* macros are used to configure the system bus on MPC83xx.
A few of the possible LSDMR_* macros were never defined in the
respective include files. This renders the SDRAM support on the
MPC8349EMDS unusable, because it uses these undefined macros.
To make the SDRAM option work, introduce these macros into the proper
config file.
Mario Six [Mon, 21 Jan 2019 08:17:38 +0000 (09:17 +0100)]
mpc83xx: Make distinct caddy2 config
vme8349.h contains two separate boards: The vme8349 itself, and the
caddy2 board. The caddy2 board is chosen by setting certain config
variables. Create a proper config file for the caddy2 board to make
Kconfig migration easier.
Furthermore, simplify the vme8349 and caddy2 configs by keeping only the
options necessary for each board.
Mario Six [Mon, 21 Jan 2019 08:17:36 +0000 (09:17 +0100)]
mpc83xx: Make distinct MPC8313ERDB targets
MPC8313ERDB has the option of either enabling NOR or NAND boot in its
config file (by commenting out certain #ifdefs). To keep this ability
after migrating options to Kconfig, we introduce two MPC8313ERDB
configs: one for NOR, and one for NAND.
Mario Six [Mon, 21 Jan 2019 08:17:31 +0000 (09:17 +0100)]
keymile: Move config files
We want to unroll several include files, while keeping include
statements consistent.
To make it easier to not break the include statements, move the include
files to the main configs directory. All three include files moved will
be unrolled, so they won't pollute the directory for long.
Mario Six [Mon, 21 Jan 2019 08:17:30 +0000 (09:17 +0100)]
keymile: Make distinct kmtegr1, kmvect1, suvd3 configs
The kmtegr1, kmvect1, and suvd3 boards all use the same config include
file with lots of #ifdefs in it.
The Kconfig migation will become easier if we get rid of these #ifdefs
first.
Hence, create distinct config include files for these boards, and unwind
the #ifdef logic in these config files to only include the options
necessary for each board.
Tom Rini [Sun, 19 May 2019 20:46:24 +0000 (16:46 -0400)]
Merge tag 'efi-2019-07-rc3-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc3 (2)
Minor patches to improve UEFI specification compliance are provided.
To allow running the UEFI self compliance tests an outdated version of
the Unicode collation protocol has been added as a configuration option
(disabled by default).
Tom Rini [Sun, 19 May 2019 13:36:48 +0000 (09:36 -0400)]
Merge branch '2019-05-19-master-imports'
- Convert SYS_[DI]CACHE_OFF to Kconfig, introduce SPL variant.
- Various bcm96* fixes.
- Import include/android_bootloader_message.h from AOSP
- Assorted other small fixes.
x86: coreboot: make it possible to process unhandled tags
coreboot makes it possible to add own entries into coreboot's
table at a per mainboard basis. As there might be some custom
ones it makes sense to provide a way to process them.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
efi_loader: check device path in InstallMultipleProtocolInterfaces
According to the UEFI spec InstallMultipleProtocolInterfaces() must check
if a device path has already been installed. In this case it must return
EFI_ALREADY_STARTED.
Cf. UEFI SCT II 2.6 A (2017),
3.3.16 InstallMultipleProtocolInterfaces(), 5.1.3.16.1.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. Unfortunately it is required to run the UEFI Self Certification
Test (SCT) II, version 2.6, 2017. So we implement it here for the sole
purpose of running the SCT. It can be removed once a compliant SCT is
available.
The configuration option defaults to no.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Most of Rob's original patch is already merged. Only the deprecated
protocol is missing. Rebase it and make it configurable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ibai Erkiaga [Wed, 15 May 2019 21:10:04 +0000 (22:10 +0100)]
Kconfig: fix FIT offset prompt text
The current prompt text for FIT external offset is identical to
SYS_TEXT_BASE which might confuse the users. Provided more accurate
description for the prompt text.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Reviewed-by: Marek Vasut <marex@denx.de>
Alex Deymo [Tue, 14 May 2019 19:05:26 +0000 (21:05 +0200)]
Import include/android_bootloader_message.h from AOSP
This takes the latest changes from AOSP from the file
bootloader_message/include/bootloader_message/bootloader_message.h
in the repository
https://android.googlesource.com/platform/bootable/recovery
and re-licensed them to BSD-3 for U-Boot.
Minimum local changes have been applied (convert C++ to C comments and
adding #ifndef __UBOOT__ block to skip all the function declarations).
Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Luca Boccassi [Tue, 14 May 2019 18:35:02 +0000 (19:35 +0100)]
tools: use read-only mmap in fit_check_sign
Add an option to open files in read-only mode in mmap_fdt so
that fit_check_sign can be used to inspect files on read-only
filesystems.
For example, this is useful when a key is shipped in a read-only
rootfs or squashfs.
Marek Vasut [Tue, 7 May 2019 19:17:02 +0000 (21:17 +0200)]
spl: Set spl_image->fdt_addr pointer for full fitImage configuration
Set the spl_image->fdt_addr pointer both for simple fitImage configuration
as well as full fitImage configuration, to let spl_perform_fixups() access
the DT and perform modifications to it if necessary.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 86f5a9a8aba6 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 86f5a9a8aba6 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 86f5a9a8aba6 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 3 May 2019 17:43:08 +0000 (19:43 +0200)]
dt: bcm63158: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
Philippe Reynes [Fri, 3 May 2019 17:43:07 +0000 (19:43 +0200)]
dt: bcm6858: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
Philippe Reynes [Fri, 3 May 2019 17:43:06 +0000 (19:43 +0200)]
watchdog: bcm6345: callback start use tick instead of ms
The function bcm6345_wdt_start use the argument timeout
as tick but it should be used as milliseconds.
A clock is added as requirement for this driver.
The frequency of the clock is then used to convert the
millisecond to ticks in the function bcm6345_wdt_start.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
Michal Simek [Mon, 25 Mar 2019 14:55:16 +0000 (15:55 +0100)]
Makefile: Prioritize external dtb if defined
Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Trevor Woerner [Fri, 3 May 2019 13:41:00 +0000 (09:41 -0400)]
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
Trevor Woerner [Fri, 3 May 2019 13:40:59 +0000 (09:40 -0400)]
CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards] Signed-off-by: Tom Rini <trini@konsulko.com>
Trevor Woerner [Fri, 3 May 2019 13:40:58 +0000 (09:40 -0400)]
CONFIG_SYS_[DI]CACHE_OFF: remove commented lines
Eventually these configuration items will be converted to Kconfig,
therefore there's little point in leaving commented-out versions of
them in include/configs.
Trevor Woerner [Fri, 3 May 2019 13:40:56 +0000 (09:40 -0400)]
CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' case
According to De Morgan's Law[1]:
!(A && B) = !A || !B
!(A || B) = !A && !B
There are 5 places in the code where we find:
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
and 4 places in the code where we find:
#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))
In words, the construct:
!defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE on?"
and the construct:
defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE off?"
Therefore
!(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
means:
"the opposite of 'are they both off?'"
in other words:
"are either or both on?"
and:
(!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
means:
"are either or both on?"
As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for
consistency.
configs: arndale: Use appropriate driver for Asix AX88760
Arndale board has an Asix AX88760 USB 2.0 Hub and Fast Ethernet combo.
The appropriate driver for it is USB_ETHER_ASIX.
The mistake probably came from misinterpretation of commit e9954b867ce0
("usb: eth: add ASIX AX88179 DRIVER") which was tested on RECS5250 COM
module. This module indeed has Exynos5250 and some similarities with
Arndale 5250 board but the USB/Ethernet chip used there is apparently
different.
Fixes: 368d670dd7e8 ("usb: net: migrate USB Ethernet adapters to Kconfig") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The CONFIG_DM_I2C_COMPAT was introduced in
include/configs/exynos5-common.h in commit 189d80166b31 ("exynos5:
enable dm i2c") and then it propagated up to configs/arndale_defconfig.
However since beginning the Arndale board (Exynos5250) was not using
I2C.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus. This setting can be thus safely removed to fix build
warning:
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arm: exynos: arndale: Remove unused CONFIG_POWER and CONFIG_POWER_I2C
The CONFIG_POWER and CONFIG_POWER_I2C were introduced in
include/configs/exynos5-common.h in commit 19bd3aaa5991 ("exynos5: fix
build break by adding CONFIG_POWER") and then it propagated up to
include/configs/arndale.h. However before that commit, there was no
build break at all on Arndale and SMDK5250 boards. It seems the commit
fixed nothing and just added unused defines.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Wed, 15 May 2019 11:10:32 +0000 (07:10 -0400)]
Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-boot
STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.
Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.
Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
James Byrne [Wed, 6 Mar 2019 12:48:27 +0000 (12:48 +0000)]
net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together
Commit 8eae9b0b45be ("net: phy: micrel: Separate KSZ9000 drivers from
KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns
that you shouldn't select both of them due to a device ID clash between
the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a
system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately
boards like the SAMA5D3xEK do contain both types of PHY, but fortunately
the Linux Micrel PHY driver provides a solution by using different PHY
ID and mask values to distinguish these chips.
This commit contains the following changes:
- The PHY ID and mask values for the KSZ9021 and the KS8721 now match
those used by the Linux driver.
- The warnings about not enabling both drivers have been removed.
- The description for PHY_MICREL_KSZ8XXX has been corrected (these are
10/100 PHYs, not GbE PHYs).
- PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE
since this is selected by PHY_MICREL_KSZ90X1.
- All of the relevant defconfig files have been updated now that
PHY_MICREL_KSZ8XXX does not default to 'Y'.
Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Wed, 6 Mar 2019 18:47:22 +0000 (19:47 +0100)]
ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files
Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi
into separate dtsi header file to make it easier to patch in custom handoff
dtsi files, without having to manually add the U-Boot bits. Shuffle the include
clauses in the A10 DT files to make it obvious what gets included where without
having to follow confusing long chain of includes, i.e. board DT file includes
everything it needs.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board
Re-add support for Aries Embedded MCV SoM, which is CycloneV based
and the associated MCVEVK and MCVEVP baseboard. The board can boot
from eMMC. Ethernet and USB is supported.
The Aries Embedded boards have been removed with commit 512305c3065e
("board/aries: Remove"). I will now take care of them.
The device-tree files are from mainline Linux commit e93c9c99a629
("Linux v5.1)".
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de> CC: Marek Vasut <marex@denx.de> CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
commit 2eac5ade78b0 ("arm: socfpga: implement proper peripheral reset")
has removed the call to 'reset_deassert_peripherals_handoff()' from
socfpga gen5 SPL since the reset driver now handles resets. However,
commit 5775c86aa48c ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
has re-added this ad-hoc reset code, so that all peripherals were now
again enabled instead of letting the drivers enable them by request.
While at it, remove this function for gen5 as it should not be used.
Fixes: commit 5775c86aa48c ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tom Rini [Mon, 13 May 2019 11:13:28 +0000 (07:13 -0400)]
Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc3
The development target for the UEFI sub-system is EBBR compliance. We have
already implemented some further protocols to enable running the UEFI Shell
and the UEFI SCT test suite.
As some boards are severely memory constrained make some of these extras
customizable.
Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory
allocation tests.