Lyude Paul [Fri, 17 Jan 2020 23:21:54 +0000 (18:21 -0500)]
drm/i915: Don't use VBT for detecting DPCD backlight controls
Despite the fact that the VBT appears to have a field for specifying
that a system is equipped with a panel that supports standard VESA
backlight controls over the DP AUX channel, so far every system we've
spotted DPCD backlight control support on doesn't actually set this
field correctly and all have it set to INTEL_BACKLIGHT_DISPLAY_DDI.
While we don't know the exact reason for this VBT misuse, talking with
some vendors indicated that there's a good number of laptop panels out
there that supposedly support both PWM backlight controls and DPCD
backlight controls as a workaround until Intel supports DPCD backlight
controls across platforms universally. This being said, the X1 Extreme
2nd Gen that I have here (note that Lenovo is not the hardware vendor
that informed us of this) PWM backlight controls are advertised, but
only DPCD controls actually function. I'm going to make an educated
guess here and say that on systems like this one, it's likely that PWM
backlight controls might have been intended to work but were never
really tested by QA.
Since we really need backlights to work without any extra module
parameters, let's take the risk here and rely on the standard DPCD caps
to tell us whether AUX backlight controls are supported or not. We still
check the VBT, just so we can print a debugging message on systems that
advertise DPCD backlight support on the panel but not in the VBT.
Changes since v3:
* Print a debugging message if we enable DPCD backlight control on a
device which doesn't report DPCD backlight controls in it's VBT,
instead of warning on custom panel backlight interfaces.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112376 Cc: Jani Nikula <jani.nikula@intel.com> Cc: Perry Yuan <pyuan@redhat.com> Cc: AceLan Kao <acelan.kao@canonical.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200117232155.135579-1-lyude@redhat.com
Jani Nikula [Tue, 21 Jan 2020 10:30:20 +0000 (12:30 +0200)]
drm/i915: drop alpha_support for good in favour of force_probe
It's been a long enough transition period since the DRM_I915_FORCE_PROBE
config and i915.force_probe module parameter were introduced in commit 6b700a702cf1 ("drm/i915: add force_probe module parameter to replace
alpha_support"). Remove alpha support.
Ville Syrjälä [Wed, 4 Dec 2019 18:05:49 +0000 (20:05 +0200)]
drm/i915/hdcp: Clean up local variables
Eliminate the inconsistencies in the hdcp code local variables:
- use dev_priv over dev
- use to_i915() instead of dev->dev_private
- initialize variables when declaring them
- a bit of declaration suffling to appease ocd
Ville Syrjälä [Wed, 4 Dec 2019 18:05:45 +0000 (20:05 +0200)]
drm/i915: Use intel_attached_encoder()
It's easy to confuse the drm_connector->encoder (legacy state
adjusted during modeset) and intel_connector->encoder (the statically
(sans. MST) attached encoder of the connector). For the latter
let's use intel_attached_encoder() consistently.
Jani Nikula [Fri, 17 Jan 2020 14:29:28 +0000 (16:29 +0200)]
drm/i915/bios: check DDI port presence based on child device
Report port presence based on port presence in VBT alone, relaxing the
requirements on supported encoders (DP, DVI, or HDMI). The goal is to
make future changes easier, however there is a small risk of reporting
more ports present than before in case of dubious VBT.
Regarding the current callers of intel_bios_is_port_present(), the
potential issue might be caused by DVO_PORT_CRT being identified as port
E in dvo_port_to_port(). Hopefully no VBT has that on SKL+ which support
DP/DVI/HDMI on port E; the current CRT init code on HSW/BDW does not
care.
Chris Wilson [Mon, 20 Jan 2020 10:49:22 +0000 (10:49 +0000)]
drm/i915/gem: Store mmap_offsets in an rbtree rather than a plain list
Currently we create a new mmap_offset for every call to
mmap_offset_ioctl. This exposes ourselves to an abusive client that may
simply create new mmap_offsets ad infinitum, which will exhaust physical
memory and the virtual address space. In addition to the exhaustion, a
very long linear list of mmap_offsets causes other clients using the
object to incur long list walks -- these long lists can also be
generated by simply having many clients generate their own mmap_offset.
However, we can simply use the drm_vma_node itself to manage the file
association (allow/revoke) dropping our need to keep an mmo per-file.
Then if we keep a small rbtree of per-type mmap_offsets, we can lookup
duplicate requests quickly.
Move the force_dvi check to a single function that can be called from
both mode validation and compute_config(). Note that currently we
don't call it from mode validation, but that will change soon.
Ville Syrjälä [Wed, 8 Jan 2020 18:12:34 +0000 (20:12 +0200)]
drm/i915/sdvo: Reduce the size of the on stack buffers
The strings we want to print to the on stack buffers should
be no more than
8 * 3 + strlen("(GET_SCALED_HDTV_RESOLUTION_SUPPORT)") + 1 = 61
bytes. So let's shrink the buffers down to 64 bytes.
Also switch the BUG_ON()s to WARN_ON()s if I made a mistake in
my arithmentic.
Ville Syrjälä [Wed, 15 Jan 2020 19:08:11 +0000 (21:08 +0200)]
drm/i915: Prefer to use the pipe to index the ddb entries
Let's use the pipe rather than the silly 'i' iterator from
for_each_oldnew_intel_crtc_in_state() for indexing the ddb
entries array. Maybe one day we can assume c99 and hide the
'i' entirely from sight.
Ville Syrjälä [Wed, 15 Jan 2020 19:08:10 +0000 (21:08 +0200)]
drm/i915: Clear most of crtc state when disabling the crtc
Currently we don't call intel_crtc_prepare_cleared_state() for crtcs
that are going to be entirely disabled (uapi.enable==false). That
means such crtcs will leave stale junk lying around in their states
and we have to sprinkle hw.enable checks all over before we can
look at the states. Let's change that a bit so that we aways do
the state clearing, even for fully disabled crtcs.
Note that we still keep some parts of the old state (see
intel_crtc_prepare_cleared_state() for the details) so probably
can't trust things 100% when hw.enable==false. But at least there's
less chance now that we end up looking at stale junk.
Ville Syrjälä [Wed, 15 Jan 2020 19:08:09 +0000 (21:08 +0200)]
drm/i915: Fix post-fastset modeset check for port sync
The post-fastset "does anyone still need a full modeset?" for
port sync looks busted. The outer loop bails out of a full modeset
is still needed by the current crtc, and then we skip forcing
a full modeset on the related crtcs. That's totally the opposite
of what we want.
The MST path has the logic mostly the other way around so it
looks correct. To fix the port sync case let's follow the MST
logic for both. So, if the current crtc already needs a modeset
we do nothing. otherwise we check if any of the related crtcs
needs a modeset, and if so we force a full modeset for the
current crtc.
And while at let's change the else if to a plain if to so
we don't have needless coupling between the MST and port sync
checks.
Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Fixes: 60e82df3971d ("drm/i915/display: Use external dependency loop for port sync") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200115190813.17971-1-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Tvrtko Ursulin [Thu, 16 Jan 2020 13:45:08 +0000 (13:45 +0000)]
drm/i915: Align engine->uabi_class/instance with i915_drm.h
In our ABI we have defined I915_ENGINE_CLASS_INVALID_NONE and
I915_ENGINE_CLASS_INVALID_VIRTUAL as negative values which creates
implicit coupling with type widths used in, also ABI, struct
i915_engine_class_instance.
One place where we export engine->uabi_class
I915_ENGINE_CLASS_INVALID_VIRTUAL is from our our tracepoints. Because the
type of the former is u8 in contrast to u16 defined in the ABI, 254 will
be returned instead of 65534 which userspace would legitimately expect.
Another place is I915_CONTEXT_PARAM_ENGINES.
Therefore we need to align the type used to store engine ABI class and
instance.
v2:
* Update the commit message mentioning get_engines and cc stable.
(Chris)
Matthew Auld [Fri, 17 Jan 2020 13:24:13 +0000 (13:24 +0000)]
drm/i915/userptr: fix size calculation
If we create a rather large userptr object(e.g 1ULL << 32) we might
shift past the type-width of num_pages: (int)num_pages << PAGE_SHIFT,
resulting in a totally bogus sg_table, which fortunately will eventually
manifest as:
gen8_ppgtt_insert_huge:463 GEM_BUG_ON(iter->sg->length < page_size)
kernel BUG at drivers/gpu/drm/i915/gt/gen8_ppgtt.c:463!
v2: more unsigned long
prefer I915_GTT_PAGE_SIZE
Fixes: 1944115857b2 ("drm/i915: Introduce mapping of user pages into video memory (userptr) ioctl") Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117132413.1170563-2-matthew.auld@intel.com
Chris Wilson [Fri, 17 Jan 2020 11:32:59 +0000 (11:32 +0000)]
drm/i915/gt: Report the currently active execlists request
Since commit c7e4d40378c6 ("drm/i915/execlists: Preempt-to-busy"), we
prune the engine->active.requests list prior to preemption, thus
removing the trace of the currently executing request. If that request
hangs rather than be preempted, we conclude that no active request was
on the GPU. Fortunately, this only impacts our debugging, and not our
means of hang detection or recovery.
v2: Use from to check the current iterator before continuing, and report
active as NULL if the current request is already completed.
Michal Wajdeczko [Fri, 17 Jan 2020 08:20:39 +0000 (08:20 +0000)]
drm/i915/guc: Introduce CT_DEBUG
As we now have "ct" available almost in all functions we can
start using dev variants of logs also for debug.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117082039.65644-6-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 17 Jan 2020 08:20:38 +0000 (08:20 +0000)]
drm/i915/guc: Switch to CT_ERROR in ct_read
As we now have "ct" available in ct_read function we can switch
from generic DRM_ERROR to our custom CT_ERROR.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117082039.65644-5-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 17 Jan 2020 08:20:37 +0000 (08:20 +0000)]
drm/i915/guc: Don't pass CTB while reading
Since we only have one RECV buffer we don't need to explicitly pass
it to the read function.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117082039.65644-4-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 17 Jan 2020 08:20:36 +0000 (08:20 +0000)]
drm/i915/guc: Don't pass CTB while writing
Since we only have one SEND buffer we don't need to explicitly pass
it to the write function.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117082039.65644-3-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 17 Jan 2020 08:20:35 +0000 (08:20 +0000)]
drm/i915/guc: Don't GEM_BUG_ON on corrupted G2H CTB
We should never BUG_ON on any corruption in CTB descriptor as
data there can be also modified by the GuC. Instead we can
use flag "is_in_error" to indicate that we will not process
any further messages over this CTB (until reset). While here
move descriptor error reporting to the function that actually
touches that descriptor.
Note that unexpected content of the specific CT messages, that
still complies with generic CT message format, shall not trigger
disabling whole CTB, as that might just indicate new unsupported
message types.
v2: drop redundant message (Daniele)
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200117082039.65644-2-michal.wajdeczko@intel.com
Since commit ccb336112b995 ("drm/i915: Start chopping up the GPU error
capture"), function 'i915_error_state_store' was defined and used with
only one parameter.
But if no 'CONFIG_DRM_I915_CAPTURE_ERROR', this function was defined
with two parameter.
Chris Wilson [Fri, 17 Jan 2020 10:21:45 +0000 (10:21 +0000)]
drm/i915: Include the debugfs params header for its own definition
drivers/gpu/drm/i915/i915_debugfs_params.c:228:15: warning: symbol 'i915_debugfs_params' was not declared. Should it be static?
drivers/gpu/drm/i915/i915_debugfs_params.c:228:16: error: no previous prototype for ‘i915_debugfs_params’ [-Werror=missing-prototypes]
228 | struct dentry *i915_debugfs_params(struct drm_i915_private *i915)
Lyude Paul [Thu, 16 Jan 2020 21:16:12 +0000 (16:16 -0500)]
drm/i915: Auto detect DPCD backlight support by default
Turns out we actually already have some companies, such as Lenovo,
shipping machines with AMOLED screens that don't allow controlling the
backlight through the usual PWM interface and only allow controlling it
through the standard EDP DPCD interface. One example of one of these
laptops is the X1 Extreme 2nd Generation.
Since we've got systems that need this turned on by default now to have
backlight controls working out of the box, let's start auto-detecting it
for systems by default based on what the VBT tells us. We do this by
changing the default value for the enable_dpcd_backlight module param
from 0 to -1.
Lyude Paul [Thu, 16 Jan 2020 21:16:10 +0000 (16:16 -0500)]
drm/i915: Fix DPCD register order in intel_dp_aux_enable_backlight()
For eDP panels, it appears it's expected that so long as the panel is in
DPCD control mode that the brightness value is never set to 0. Instead,
if the desired effect is to set the panel's backlight to 0 we're
expected to simply turn off the backlight through the
DP_EDP_DISPLAY_CONTROL_REGISTER.
We already do the latter correctly in intel_dp_aux_disable_backlight().
But, we make the mistake of writing the DPCD registers in the wrong
order when enabling the backlight in intel_dp_aux_enable_backlight()
since we currently enable the backlight through
DP_EDP_DISPLAY_CONTROL_REGISTER before writing the brightness level. On
the X1 Extreme 2nd Generation, this appears to have the potential of
confusing the panel in such a way that further attempts to set the
brightness don't actually change the backlight as expected and leave it
off. Presumably, this happens because the incorrect register writing
order briefly leaves the panel with DPCD mode enabled and a 0 brightness
level set.
So, reverse the order we write the DPCD registers when enabling the
panel backlight so that we write the brightness value first, and enable
the backlight second. This fix appears to be the final bit needed to get
the backlight on the ThinkPad X1 Extreme 2nd Generation's AMOLED screen
working.
Lyude Paul [Thu, 16 Jan 2020 21:16:09 +0000 (16:16 -0500)]
drm/i915: Assume 100% brightness when not in DPCD control mode
Currently we always determine the initial panel brightness level by
simply reading the value from DP_EDP_BACKLIGHT_BRIGHTNESS_MSB/LSB. This
seems wrong though, because if the panel is not currently in DPCD
control mode there's not really any reason why there would be any
brightness value programmed in the first place.
This appears to be the case on the Lenovo ThinkPad X1 Extreme 2nd
Generation, where the default value in these registers is always 0 on
boot despite the fact the panel runs at max brightness by default.
Getting the initial brightness value correct here is important as well,
since the panel on this laptop doesn't behave well if it's ever put into
DPCD control mode while the brightness level is programmed to 0.
So, let's fix this by checking what the current backlight control mode
is before reading the brightness level. If it's in DPCD control mode, we
return the programmed brightness level. Otherwise we assume 100%
brightness and return the highest possible brightness level. This also
prevents us from accidentally programming a brightness level of 0.
This is one of the many fixes that gets backlight controls working on
the ThinkPad X1 Extreme 2nd Generation with optional 4K AMOLED screen.
Changes since v1:
* s/DP_EDP_DISPLAY_CONTROL_REGISTER/DP_EDP_BACKLIGHT_MODE_SET_REGISTER/
- Jani
Lyude Paul [Thu, 16 Jan 2020 21:16:08 +0000 (16:16 -0500)]
drm/i915: Fix eDP DPCD aux max backlight calculations
Max backlight value for the panel was being calculated using byte
count i.e. 0xffff if 2 bytes are supported for backlight brightness
and 0xff if 1 byte is supported. However, EDP_PWMGEN_BIT_COUNT
determines the number of active control bits used for the brightness
setting. Thus, even if the panel uses 2 byte setting, it might not use
all the control bits. Thus, max backlight should be set based on the
value of EDP_PWMGEN_BIT_COUNT instead of assuming 65535 or 255.
Additionally, EDP_PWMGEN_BIT_COUNT was being updated based on the VBT
frequency which results in a different max backlight value. Thus,
setting of EDP_PWMGEN_BIT_COUNT is moved to setup phase instead of
enable so that max backlight can be calculated correctly. Only the
frequency divider is set during the enable phase using the value of
EDP_PWMGEN_BIT_COUNT.
This is based off the original patch series from Furquan Shaikh
<furquan@google.com>:
Changes since original patch:
* Remove unused intel_dp variable in intel_dp_aux_setup_backlight()
* Fix checkpatch issues
* Make sure that we rewrite the pwmgen bit count whenever we bring the
panel out of D3 mode
v2 by Jani:
* rebase
* fix readb return value check
Vivek Kasireddy [Wed, 15 Jan 2020 01:23:05 +0000 (17:23 -0800)]
drm/i915/dsi: Lookup the i2c bus from ACPI NS only if CONFIG_ACPI=y (v2)
Perform the i2c bus/adapter lookup from ACPI Namespace only if ACPI is
enabled in the kernel config. If ACPI is not enabled or if the lookup
fails, we'll fallback to using the VBT for identifying the i2c bus.
v2: Add fixes tag (Jani)
Fixes: 19f655c20234 ("drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block (v3)") Cc: Hans de Goede <hdegoede@redhat.com> Cc: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Zhang Xiaoxu <zhangxiaoxu5@huawei.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200115012305.27395-1-vivek.kasireddy@intel.com
Chris Wilson [Thu, 16 Jan 2020 18:47:54 +0000 (18:47 +0000)]
drm/i915/execlists: Offline error capture
Currently, we skip error capture upon forced preemption. We apply forced
preemption when there is a higher priority request that should be
running but is being blocked, and we skip inline error capture so that
the preemption request is not further delayed by a user controlled
capture -- extending the denial of service.
However, preemption reset is also used for heartbeats and regular GPU
hangs. By skipping the error capture, we remove the ability to debug GPU
hangs.
In order to capture the error without delaying the preemption request
further, we can do an out-of-line capture by removing the guilty request
from the execution queue and scheduling a worker to dump that request.
When removing a request, we need to remove the entire context and all
descendants from the execution queue, so that they do not jump past.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/738 Fixes: f8c83d5a79eb ("drm/i915/execlists: Force preemption") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200116184754.2860848-3-chris@chris-wilson.co.uk
Chris Wilson [Thu, 16 Jan 2020 18:47:53 +0000 (18:47 +0000)]
drm/i915/gt: Allow temporary suspension of inflight requests
In order to support out-of-line error capture, we need to remove the
active request from HW and put it to one side while a worker compresses
and stores all the details associated with that request. (As that
compression may take an arbitrary user-controlled amount of time, we
want to let the engine continue running on other workloads while the
hanging request is dumped.) Not only do we need to remove the active
request, but we also have to remove its context and all requests that
were dependent on it (both in flight, queued and future submission).
Finally once the capture is complete, we need to be able to resubmit the
request and its dependents and allow them to execute.
v2: Replace stack recursion with a simple list.
v3: Check all the parents, not just the first, when searching for a
stuck ancestor!
Chris Wilson [Thu, 16 Jan 2020 18:47:52 +0000 (18:47 +0000)]
drm/i915: Keep track of request among the scheduling lists
If we keep track of when the i915_request.sched.link is on the HW
runlist, or in the priority queue we can simplify our interactions with
the request (such as during rescheduling). This also simplifies the next
patch where we introduce a new in-between list, for requests that are
ready but neither on the run list or in the queue.
v2: Update i915_sched_node.link explanation for current usage where it
is a link on both the queue and on the runlists.
drm/i915/psr: Share the computation of idle frames
Both activate functions and the dc3co disable function were doing the
same thing, so better move to a function and share.
Also while at it adding a WARN_ON to catch invalid values.
Chris Wilson [Wed, 15 Jan 2020 17:58:29 +0000 (17:58 +0000)]
drm/i915/execlists: Leave resetting ring to intel_ring
We need to allow concurrent intel_context_unpin, which means avoiding
doing destructive operations like intel_ring_reset(). This was already
fixed for intel_ring_unpin() in commit f868dbe8f13d ("drm/i915/gt: Make
intel_ring_unpin() safe for concurrent pint"), but I overlooked that
execlists_context_unpin() also made the same mistake.
Reported-by: Matthew Brost <matthew.brost@intel.com> Fixes: 243f5ed4c03e ("drm/i915/gt: Drop mutex serialisation between context pin/unpin")
References: f868dbe8f13d ("drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200115175829.2761329-1-chris@chris-wilson.co.uk
Ville Syrjälä [Fri, 13 Dec 2019 13:34:51 +0000 (15:34 +0200)]
drm/i915/fbc: Nuke fbc_supported()
fbc_supported() is just a pointless wrapper for HAS_FBC(). Get
rid of it. In places where we're operating on a specific plane
we can replace this with a plane->has_fbc check to avoid
doing anything for crtcs that don't even support fbc.
Ville Syrjälä [Fri, 13 Dec 2019 13:34:50 +0000 (15:34 +0200)]
drm/i915/fbc: Move the plane state check into the fbc functions
Instead of dealing with the presence/absence of the primary
plane in the higher level pre/post plane update code let's
move all that into the fbc code itself. Now the higher level
code doesn't have to think about FBC details anymore.
Jani Nikula [Thu, 5 Dec 2019 15:43:41 +0000 (17:43 +0200)]
drm/i915/params: support bool values for int and uint params
It's not uncommon for us to switch param types between bools and ints,
often having otherwise bool semantics but -1 value for platform
default. Allow bool values (such as YyNn) for ints.
Jani Nikula [Thu, 5 Dec 2019 15:43:40 +0000 (17:43 +0200)]
drm/i915/params: add i915 parameters to debugfs
Add a debugfs subdirectory i915_params with all the i915 module
parameters. This is a first step, with lots of boilerplate, and not much
benefit yet.
This will result in a new device specific debugfs directory at
/sys/kernel/debug/dri/<N>/i915_params duplicating the module specific
sysfs directory at /sys/module/i915/parameters/. Going forward, all
users of the parameters should use the debugfs, with the module
parameters being phased out.
Add debugfs permissions to I915_PARAMS_FOR_EACH(). This duplicates the
mode with module parameter sysfs, but the goal is to make the module
parameters read-only initial values for device specific parameters.
0 mode will bypass debugfs creation. Use it for verbose_state_checks
which will need special attention in follow-up work.
TGL has now a table for RBR and HBR and another table for HBR2 over
combo phys. The HBR2 one has some small changes comparing to the ICL
one, so adding two new tables and adding a function to return TGL
combo phy tables.
v2:
- reordered the tgl_combo_phy_ddi_translations_dp_hbr2 to reduce diff
(Matt)
- removed definition of rates, kept using raw number(Jani and Ville)
- changed code to use icl_get_combo_buf_trans() for non-DP as those
are equal between TGL and ICL(Matt)
BSpec: 49291 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110233902.154960-1-jose.souza@intel.com
Ville Syrjälä [Fri, 10 Jan 2020 18:32:23 +0000 (20:32 +0200)]
drm/i915: Make a copy of the ggtt view for slave plane
intel_prepare_plane_fb() will always pin plane_state->hw.fb whenever
it is present. We copy that from the master plane to the slave plane,
but we fail to copy the corresponding ggtt view. Thus when it comes time
to pin the slave plane's fb we use some stale ggtt view left over from
the last time the plane was used as a non-slave plane. If that previous
use involved 90/270 degree rotation or remapping we'll try to shuffle
the pages of the new fb around accordingingly. However the new
fb may be backed by a bo with less pages than what the ggtt view
rotation/remapped info requires, and so we we trip a GEM_BUG().
Steps to reproduce on icl:
1. plane 1: whatever
plane 6: largish !NV12 fb + 90 degree rotation
2. plane 1: smallish NV12 fb
plane 6: make invisible so it gets slaved to plane 1
3. GEM_BUG()
Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/issues/951 Fixes: 52cbc1a80ea9 ("drm/i915: Remove special case slave handling during hw programming, v3.") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110183228.8199-1-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 13 Jan 2020 15:45:55 +0000 (15:45 +0000)]
drm/i915/gem: Take local vma references for the parser
Take and hold a reference to each of the vma (and their objects) as we
process them with the cmdparser. This stops them being freed during the
work if the GEM execbuf is interrupted and the request we expected to
keep the objects alive is incomplete.
Fixes: f1c2907b8e7e ("drm/i915/gem: Asynchronous cmdparser") Closes: https://gitlab.freedesktop.org/drm/intel/issues/970 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200113154555.1909639-1-chris@chris-wilson.co.uk
Michal Wajdeczko [Sat, 11 Jan 2020 23:11:14 +0000 (23:11 +0000)]
drm/i915/guc: Use correct name for last CT fence
While we have function that returns "next fence" that can be used
by new CT request, we internally store value of the last used fence.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200111231114.59208-5-michal.wajdeczko@intel.com
Michal Wajdeczko [Sat, 11 Jan 2020 23:11:13 +0000 (23:11 +0000)]
drm/i915/guc: Update CTB helpers to use CT_ERROR
Update GuC CTB action helpers to benefit from new CT_ERROR macro.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200111231114.59208-4-michal.wajdeczko@intel.com
Michal Wajdeczko [Sat, 11 Jan 2020 23:11:12 +0000 (23:11 +0000)]
drm/i915/guc: Introduce CT_ERROR
We should start using dev variants of error logging and
to simplify that introduce helper macro that will do any
necessary conversions to obtain pointer to device struct.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200111231114.59208-3-michal.wajdeczko@intel.com
Michal Wajdeczko [Sat, 11 Jan 2020 23:11:11 +0000 (23:11 +0000)]
drm/i915/guc: Simpler CT message size calculation
We need CT message size in bytes so just use that in helper var.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200111231114.59208-2-michal.wajdeczko@intel.com
Chris Wilson [Tue, 14 Jan 2020 10:56:48 +0000 (10:56 +0000)]
drm/i915/gt: Clear rc6 residency trackers across suspend
On suspend, the rc6 residency counters (stored in HW registers) will be
lost and cleared. However, we keep track of the rc6 residency to provide
a continuous 64b sampling, and if we see the HW value go backwards, we
assume it overflowed and add on 32b/40b -- an interesting artifact when
sampling across suspend.
Chris Wilson [Tue, 14 Jan 2020 10:56:47 +0000 (10:56 +0000)]
drm/i915/pmu: Correct the rc6 offset upon enabling
The rc6 residency starts ticking from 0 from BIOS POST, but the kernel
starts measuring the time from its boot. If we start measuruing
I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from
0 and then upon first activity (park/unpark) add in all the rc6
residency since boot. After the first park with the sampler engaged, the
sleep/active counters are aligned.
Chris Wilson [Mon, 13 Jan 2020 10:44:39 +0000 (10:44 +0000)]
drm/i915/gt: Always reset the timeslice after a context switch
Currently, we reset the timer after a pre-eemption event. This has the
side-effect that the timeslice runs into the second context after the
first is completed after a normal promotion event, causing the second
context to be swapped out early and switched for a third context. To be
more fair, we want to reset the clock after promotion as well.
Zhang Xiaoxu [Mon, 13 Jan 2020 08:19:42 +0000 (16:19 +0800)]
drm/i915: Fix too few arguments to function i915_capture_error_state
If 'CONFIG_DRM_I915_CAPTURE_ERROR' not configured, there is an error
when compile the kernel:
drivers/gpu/drm/i915/gt/intel_reset.c:
In function intel_gt_handle_error:
drivers/gpu/drm/i915/gt/intel_reset.c:1233:3:
error: too few arguments to function i915_capture_error_state
i915_capture_error_state(gt->i915);
^~~~~~~~~~~~~~~~~~~~~~~~
In file included
from ./drivers/gpu/drm/i915/i915_drv.h:97:0,
from ./drivers/gpu/drm/i915/display/intel_display_types.h:46,
from drivers/gpu/drm/i915/gt/intel_reset.c:10:
./drivers/gpu/drm/i915/i915_gpu_error.h:267:20: note: declared here
static inline void i915_capture_error_state(struct drm_i915_private *dev_priv,
Fixes: ccb336112b99 ("drm/i915: Start chopping up the GPU error capture") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Xiaoxu <zhangxiaoxu5@huawei.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200113081942.15982-1-zhangxiaoxu5@huawei.com
Zhang Xiaoxu [Mon, 13 Jan 2020 10:40:09 +0000 (18:40 +0800)]
drm/i915: Fix multiple definition of 'i915_vma_capture_finish'
If 'CONFIG_DRM_I915_CAPTURE_ERROR' not configured, there are some
errors like:
drivers/gpu/drm/i915/i915_irq.o:
In function `i915_vma_capture_finish':
./drivers/gpu/drm/i915/i915_gpu_error.h:312:
multiple definition of `i915_vma_capture_finish'
drivers/gpu/drm/i915/i915_drv.o:
./drivers/gpu/drm/i915/i915_gpu_error.h:312: first defined here
So, add 'static inline' on the defineation of the 'i915_vma_capture_finish'
Fixes: 3824c3abfc4b3("drm/i915: Correct typo in i915_vma_compress_finish stub") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Xiaoxu <zhangxiaoxu5@huawei.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200113104009.13274-1-zhangxiaoxu5@huawei.com
Ville Syrjälä [Wed, 4 Dec 2019 18:05:42 +0000 (20:05 +0200)]
drm/i915: Pass intel_connector to intel_attached_*()
Life is usually easier when we pass around intel_ types instead
of drm_ types. In this case it might not be, but I think being
consistent is a good thing anyway. Also some of this might get
cleaned up a bit more later as we keep propagating the intel_
types further.
drm/i915: Bump up CDCLK to eliminate underruns on TGL
There seems to be some undocumented bandwidth
bottleneck/dependency which scales with CDCLK,
causing FIFO underruns when CDCLK is too low,
even when it's correct from BSpec point of view.
Currently for TGL platforms we calculate
min_cdclk initially based on pixel_rate divided
by 2, accounting for also plane requirements,
however in some cases the lowest possible CDCLK
doesn't work and causing the underruns.
We've found experimentally that raising cdclk to
at least pixel_rate (rather than pixel_rate/2)
eliminates these underruns, so let's use this as a
temporary workaround until the hardware team
can suggest a more precise remedy.
Explicitly stating here that this seems to be currently
rather a Hack, than final solution.
v2: Use clamp operation instead of min(Matt Roper)
v3: - Fixed commit message(Matt Roper)
- Now using pixel_rate instead of max_cdclk(Jani Nikula)
- Switched to max from clamp(Ville Syrjälä)
Hopefully this hybrid satisfies everyone :)
Tvrtko Ursulin [Fri, 10 Jan 2020 11:32:53 +0000 (11:32 +0000)]
drm/i915/pmu: Do not use colons or dashes in PMU names
We use PCI device path in the registered PMU name in order to distinguish
between multiple GPUs. But since tools/perf reserves a special meaning to
dash and colon characters we need to transliterate them to something else.
We choose an underscore.
v2:
* Use strreplace. (Chris)
* Dashes are not good either. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reported-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> Fixes: 7699ecd2ca7a ("drm/i915/pmu: Support multiple GPUs") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200110113253.12535-1-tvrtko.ursulin@linux.intel.com
Michal Wajdeczko [Fri, 10 Jan 2020 22:27:23 +0000 (22:27 +0000)]
drm/i915/uc: Add sanitize to to intel_uc_ops
uC sanitization is only meaningful if we are running with uC present
or enabled. Make this function part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-5-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 10 Jan 2020 22:27:22 +0000 (22:27 +0000)]
drm/i915/uc: Add init/fini to to intel_uc_ops
uC preparation and cleanup steps are only meaningful if we are
running with uC enabled. Make these functions part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-4-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 10 Jan 2020 22:27:21 +0000 (22:27 +0000)]
drm/i915/uc: Add init_fw/fini_fw to to intel_uc_ops
Firmware fetching and cleanup steps are only meaningful if we are
running with uC enabled. Make these functions part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-3-michal.wajdeczko@intel.com
Michal Wajdeczko [Fri, 10 Jan 2020 22:27:20 +0000 (22:27 +0000)]
drm/i915/uc: Add ops to intel_uc
Instead of spreading multiple conditionals across the uC code
to find out current mode of uC operation, start using predefined
set of function pointers that reflect that mode.
Begin with pair of init_hw/fini_hw functions that are responsible
for uC hardware initialization and cleanup.
v2: drop ops_none, use macro to generate ops helpers
v3: reuse __uc_check_hw to avoid redundant comment
v4: forward declare ops struct vs functions
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-2-michal.wajdeczko@intel.com
Chris Wilson [Fri, 10 Jan 2020 14:44:18 +0000 (14:44 +0000)]
drm/i915/gt: Hold rpm wakeref before taking ggtt->vm.mutex
We need to hold the runtime-pm wakeref to update the global PTEs (as
they exist behind a PCI BAR). However, some systems invoke ACPI during
runtime resume and so require allocations, which is verboten inside the
vm->mutex. Ergo, we must not use intel_runtime_pm_get() inside the
mutex, but lift the call outside.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/958 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110144418.1415639-1-chris@chris-wilson.co.uk
Vivek Kasireddy [Fri, 10 Jan 2020 18:11:23 +0000 (10:11 -0800)]
drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block (v3)
Parsing the i2c element is mainly done to transfer the payload from the
MIPI sequence block to the relevant slave device. In some cases, the
commands that are part of the payload can be used to turn on the backlight.
This patch is actually a refactored version of this old patch:
https://lists.freedesktop.org/archives/intel-gfx/2014-December/056897.html
In addition to the refactoring, the original patch is augmented by
looking up the i2c bus from ACPI NS instead of relying on the bus number
provided in the VBT.
This patch was tested on Aava Mobile's Inari 10 tablet. It enabled
turning on the backlight by transferring the payload to the device.
v2:
- Add DRM_DEV_ERROR for invalid adapter and failed transfer and also
drop the DRM_DEBUG that existed originally. (Hans)
- Add two gotos instead of one to clean things up properly.
v3:
- Identify the device on which this patch was tested in the commit
message (Ville)
Cc: Hans de Goede <hdegoede@redhat.com> Cc: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110181123.14536-1-vivek.kasireddy@intel.com
Chris Wilson [Fri, 10 Jan 2020 12:30:59 +0000 (12:30 +0000)]
drm/i915: Drop request list from error state
The list of requests from after the hang tells little about the hang
itself, only how busy userspace was after the fact. As it pertains
nothing to the HW state, drop it from the error state.
Chris Wilson [Fri, 10 Jan 2020 12:30:58 +0000 (12:30 +0000)]
drm/i915: Drop the shadow ring state from the error capture
The shadow ring regs (ring->head, ring->tail) are meaningless in the
post-mortem dump as they do not related to anything on HW. Remove them
from the coredump.
Chris Wilson [Fri, 10 Jan 2020 12:30:56 +0000 (12:30 +0000)]
drm/i915: Start chopping up the GPU error capture
In the near future, we will want to start a GPU error capture from a new
context, from inside the softirq region of a forced preemption. To do
so requires us to break up the monolithic error capture to provide new
entry points with finer control; in particular focusing on one
engine/gt, and being able to compose an error state from little pieces
of HW capture.
Chris Wilson [Fri, 10 Jan 2020 11:04:02 +0000 (11:04 +0000)]
drm/i915/gt: Mark ring->vma as active while pinned
As we use the active state to keep the vma alive while we are reading
its contents during GPU error capture, we need to mark the
ring->vma as active during execution if we want to include the rinbuffer
in the error state.
Reported-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 1912e1b11c59 ("drm/i915: Coordinate i915_active with its own mutex") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110110402.1231745-3-chris@chris-wilson.co.uk
Chris Wilson [Fri, 10 Jan 2020 11:04:01 +0000 (11:04 +0000)]
drm/i915/gt: Mark context->state vma as active while pinned
As we use the active state to keep the vma alive while we are reading
its contents during GPU error capture, we need to mark the
context->state vma as active during execution if we want to include it
in the error state.
Reported-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 1912e1b11c59 ("drm/i915: Coordinate i915_active with its own mutex") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200110110402.1231745-2-chris@chris-wilson.co.uk
Chris Wilson [Fri, 10 Jan 2020 11:04:00 +0000 (11:04 +0000)]
drm/i915/gt: Skip trying to unbind in restore_ggtt_mappings
Currently we first to try to unbind the VMA (and lazily rebind on next
use) as an optimisation during restore_ggtt_mappings. Ideally, the only
objects in the GGTT upon resume are the pinned kernel objects which
can't be unbound and need to be restored. As the unbind interferes with
the plan to mark those objects as active for error capture, forgo the
optimisation.
projects / kernel.git / log