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2 years agoarm: mvebu: db-mv784mp-gp_defconfig: Enable DM_I2C
Stefan Roese [Thu, 18 Nov 2021 08:19:32 +0000 (09:19 +0100)]
arm: mvebu: db-mv784mp-gp_defconfig: Enable DM_I2C

Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
2 years agoarm: mvebu: theadorable_debug_defconfig: Enable DM_I2C
Stefan Roese [Thu, 18 Nov 2021 08:19:31 +0000 (09:19 +0100)]
arm: mvebu: theadorable_debug_defconfig: Enable DM_I2C

Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
2 years agoMerge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm...
Tom Rini [Fri, 17 Dec 2021 23:18:15 +0000 (18:18 -0500)]
Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

binman support for ATF FIP
fdtgrep fixes for empty devicetree

2 years agofdtgrep: Handle an empty output tree
Simon Glass [Wed, 8 Dec 2021 16:55:35 +0000 (09:55 -0700)]
fdtgrep: Handle an empty output tree

In strange cases it is possible for fdtgrep to find nothing to output.
Typically this means that the resulting SPL device tree is not going to
allow anything to boot, but at present the tree is actually invalid,
since it only has an END tag in the struct region.

The FDT spec requires at least a root node. So add a special case to
include at least this, if the FDT_REG_SUPERNODES flag is set.

This ensures that grepping an empty tree still produces a valid tree.

Also add comments to the enum since it is not completely obvious from
the names now.

The typical symptom of this problem is a message from binman:

   pylibfdt error -11: FDT_ERR_BADSTRUCTURE

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agofdtgrep: Correct alignment of struct section
Simon Glass [Wed, 8 Dec 2021 16:55:34 +0000 (09:55 -0700)]
fdtgrep: Correct alignment of struct section

When outputting a devicetree we should not align the struct section to a
16-byte boundary. The normal position is fine, which is 8-byte aligned.

This avoids leaving adding 8 extra zero bytes in the output tree in the
case where the reserved section is empty (i.e has 16 zero bytes).

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoiot2050: binman: add missing-msg for blobs
Ivan Mikhaylov [Thu, 9 Dec 2021 16:10:53 +0000 (16:10 +0000)]
iot2050: binman: add missing-msg for blobs

Add the 'missing-msg' for blobs for more detailed output on missing system
firmware and SEBoot blobs.

Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix minor typos:
Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Use less hard coded magic when inserting new PATH
Andy Shevchenko [Mon, 6 Dec 2021 11:44:13 +0000 (14:44 +0300)]
binman: Use less hard coded magic when inserting new PATH

Instead of joining hard coded '..' to the run-time path of the executable,
take just a dirname out of it. Besides that, use $(srctree) where it makes
sense.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2 years agobinman: Do not pollute source tree when build with `make O=...`
Andy Shevchenko [Mon, 6 Dec 2021 11:44:12 +0000 (14:44 +0300)]
binman: Do not pollute source tree when build with `make O=...`

Importing libraries in Python caches the bytecode by default.
Since we run scripts in source tree it ignores the current directory
settings, which is $(srctree), and creates cache just in the middle
of the source tree. Move cache to the current directory.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2 years agoConvert CONFIG_PHYSMEM to Kconfig
Simon Glass [Wed, 24 Nov 2021 16:26:42 +0000 (09:26 -0700)]
Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
   CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>
2 years agobinman: Add support for ATF FIP
Simon Glass [Wed, 24 Nov 2021 04:08:59 +0000 (21:08 -0700)]
binman: Add support for ATF FIP

This format is used in firmware binaries so we may as well supported it.

With this patch binman supports creating, listing and updating FIPs, as
well as extracting files from one, provided that an FDTMAP is also present
somewhere in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Add a utility module for ATF FIP
Simon Glass [Wed, 24 Nov 2021 04:08:58 +0000 (21:08 -0700)]
binman: Add a utility module for ATF FIP

Add support for this format which is used by ARM Trusted Firmware to find
firmware binaries to load.

FIP is like a simpler version of FMAP but uses a UUID instead of a name,
for each entry.

It supports reading a FIP, writing a FIP and parsing the ATF source code
to get a list of supported UUIDs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoMerge tag 'u-boot-at91-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 17 Dec 2021 12:25:34 +0000 (07:25 -0500)]
Merge tag 'u-boot-at91-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2022.04 cycle:

This feature set includes : support for the new QSPI hardware on
sama7g5, small fixes on sam9x60 and sama7g5, some additions of commands
and PIO controller on sam9x60/sam9x60ek.

2 years agoARM: mach-at91: Add compile time option to choose proper timer
Hari Prasath [Mon, 13 Dec 2021 05:00:03 +0000 (10:30 +0530)]
ARM: mach-at91: Add compile time option to choose proper timer

New SoC's of AT91 family with ARM-9 core includes a regular timer and a 64-bit
timer.This patch adds a compile time option to the Makefile such that the old
timer driver is chosen and compiled as default if none of timer configuration
options are explicitly defined in the board configs.

Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2 years agoARM: mach-at91: update alternate function of signal PD20
Hari Prasath [Wed, 8 Dec 2021 05:14:01 +0000 (10:44 +0530)]
ARM: mach-at91: update alternate function of signal PD20

The alternate function of PD20 is 4 as per the datasheet of
sama7g5 and not 5 as defined earlier.

Fixes: 6e7e9c4090 ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2 years agoARM: dts: at91: sama7g5ek: Add QSPI0 node
Tudor Ambarus [Wed, 3 Nov 2021 17:07:41 +0000 (19:07 +0200)]
ARM: dts: at91: sama7g5ek: Add QSPI0 node

QSPI0 has a MX66LM1G45G SPI NOR flash connected.
Enable the controller and describe the flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2 years agoARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes
Tudor Ambarus [Wed, 3 Nov 2021 17:07:40 +0000 (19:07 +0200)]
ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes

sama7g5 embedds an OSPI and a QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
   and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2 years agospi: atmel-quadspi: Add support for SAMA7G5 QSPI
Tudor Ambarus [Wed, 3 Nov 2021 16:47:10 +0000 (18:47 +0200)]
spi: atmel-quadspi: Add support for SAMA7G5 QSPI

sama7g5 QSPI has:
1/ One Octal Serial Peripheral Interfaces (QSPI0) Supporting Up to
   200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported
2/ One Quad Serial Peripheral Interfaces (QSPI1) Supporting Up to
   90 MHz DDR/133 MHz SDR

The QSPI controller of SAMA7G5 uses different clock domains, hence extra
synchronization operations must be performed before accessing some
registers. Differentiate between the versions of the IP using has_gclk.
Differentiate between QSPI0 and QSPI1 with has_octal.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoMerge tag 'dm-pull-5dec21a' of https://source.denx.de/u-boot/custodians/u-boot-dm...
Tom Rini [Mon, 6 Dec 2021 03:42:07 +0000 (22:42 -0500)]
Merge tag 'dm-pull-5dec21a' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

binman refactoring to improve section handling
bloblist - allow it to be allocated
sandbox config-header cleanup

# gpg: Signature made Sun 05 Dec 2021 10:14:24 PM EST
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# gpg:                issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
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# Primary key fingerprint: B25C 0022 AF86 A7CC 1655  B627 7F17 3A3E 9008 ADE6

2 years agoide: Drop ATA_PORT_ADDR
Simon Glass [Wed, 24 Nov 2021 16:26:48 +0000 (09:26 -0700)]
ide: Drop ATA_PORT_ADDR

This is not needed anymore. Drop it to simplify the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2 years agoide: Drop unused CONFIG options
Simon Glass [Wed, 24 Nov 2021 16:26:47 +0000 (09:26 -0700)]
ide: Drop unused CONFIG options

CONFIG_SYS_ATA_PORT_ADDR is not used in the code anymore. Drop it and use
ATA_PORT_ADDR() locally instead.

Drop CONFIG_IDE_RESET_ROUTINE and CONFIG_IDE_SWAP_IO which are also
unused.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: Drop CONFIG_SYS_TIMER_RATE
Simon Glass [Wed, 24 Nov 2021 16:26:46 +0000 (09:26 -0700)]
sandbox: Drop CONFIG_SYS_TIMER_RATE

This is not used by sandbox since it uses driver model for the timer.

Drop it.

Also update the tools_only build to avoid build errors, since it does
actually build U-Boot too. Enable DM so we can use CONFIG_TIMER,
disable EFI_LOADER to avoid an error about board_quiesce_devices() and
disable NET to avoid having to define CONFIG_AVB_BUF_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agokeyboard: Add a migration message
Simon Glass [Wed, 24 Nov 2021 16:26:45 +0000 (09:26 -0700)]
keyboard: Add a migration message

A few boards still use the old keyboard mechanism. Set a deadline for them
to update to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoConvert CONFIG_KEYBOARD to Kconfig
Simon Glass [Wed, 24 Nov 2021 16:26:44 +0000 (09:26 -0700)]
Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
   CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoConvert CONFIG_SYS_FDT_LOAD_ADDR to Kconfig
Simon Glass [Wed, 24 Nov 2021 16:26:41 +0000 (09:26 -0700)]
Convert CONFIG_SYS_FDT_LOAD_ADDR to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_FDT_LOAD_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: Drop CONFIG_HOST_MAX_DEVICES
Simon Glass [Wed, 24 Nov 2021 16:26:40 +0000 (09:26 -0700)]
sandbox: Drop CONFIG_HOST_MAX_DEVICES

This can go in the related header file. Drop the CONFIG option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2 years agotrace: sandbox: Use only the Kconfig options
Simon Glass [Wed, 24 Nov 2021 16:26:39 +0000 (09:26 -0700)]
trace: sandbox: Use only the Kconfig options

At present there are Kconfig options for tracing, but sandbox uses
plain #defines to set them. Correct this and make the tracing command
default to enabled so that this is not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Rename _ReadSubnodes() to ReadEntries()
Simon Glass [Wed, 24 Nov 2021 04:09:53 +0000 (21:09 -0700)]
binman: Rename _ReadSubnodes() to ReadEntries()

This method name is more commonly used for this function. Use it
consistently.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Support lists of external blobs
Simon Glass [Wed, 24 Nov 2021 04:09:52 +0000 (21:09 -0700)]
binman: Support lists of external blobs

Sometimes it is useful to have a list of related external blobs in a
single entry. An example is the DDR binaries used by meson. There are
9 files in total. Add support for this, so we don't have to have a
separate entry for each.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agodtoc: Add support for reading string-list properties
Simon Glass [Wed, 24 Nov 2021 04:09:51 +0000 (21:09 -0700)]
dtoc: Add support for reading string-list properties

Add a function to read a list of strings from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Allow extracting a file in an alternative format
Simon Glass [Wed, 24 Nov 2021 04:09:50 +0000 (21:09 -0700)]
binman: Allow extracting a file in an alternative format

In some cases entries encapsulate other data and it is useful to access
the data within. An example is the fdtmap which consists of a 16-byte
header, followed by a devicetree.

Provide an option to specify an alternative format when extracting files.
In the case of fdtmap, this is 'fdt', which produces an FDT file which can
be viewed with fdtdump.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Allow listing an image created by a newer version
Simon Glass [Wed, 24 Nov 2021 04:09:49 +0000 (21:09 -0700)]
binman: Allow listing an image created by a newer version

If an older version of binman is used to list images created by a newer
one, it is possible that it will contain entry types that are not
supported. At present this produces an error.

Adjust binman to use a plain 'blob' entry type to cope with this, so the
image can at least be listed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Allow providing tools and blob directories
Simon Glass [Wed, 24 Nov 2021 04:09:48 +0000 (21:09 -0700)]
binman: Allow providing tools and blob directories

At present it is necessary to symlink files containing external blobs into
the U-Boot tree in order for binman to find them. This is not very
convenient.

Add two new environment/Makefile variables to help with this. Add
documentation as well, fixing a related nit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobloblist: Support allocating the bloblist
Simon Glass [Thu, 4 Nov 2021 03:09:20 +0000 (21:09 -0600)]
bloblist: Support allocating the bloblist

Typically the bloblist is positioned at a fixed address in memory until
relocation. This is convenient when it is set up in SPL or before
relocation.

But for EFI we want to set it up only when U-Boot proper is running. Add
a way to allocate it using malloc() and update the documentation to cover
this aspect of bloblist.

Note there are no tests of this feature at present, nor any direct testing
of bloblist_init().

This can be added, e.g. by making this option controllable at runtime.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Rename testCbfsNoCOntents()
Simon Glass [Tue, 23 Nov 2021 18:03:54 +0000 (11:03 -0700)]
binman: Rename testCbfsNoCOntents()

Use a lower-case O as was intended.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: cfbs: Refactor ObtainContents() for consistency
Simon Glass [Tue, 23 Nov 2021 18:03:53 +0000 (11:03 -0700)]
binman: cfbs: Refactor ObtainContents() for consistency

Update this to use the same arguments as entry_Section uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: cbfs: Refactor the init process
Simon Glass [Tue, 23 Nov 2021 18:03:52 +0000 (11:03 -0700)]
binman: cbfs: Refactor the init process

Update the constructor to work in the recommended way, where the node
properties are read in a separate function. This makes it more similar to
entry_Section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Use normal entries in cbfs
Simon Glass [Tue, 23 Nov 2021 18:03:51 +0000 (11:03 -0700)]
binman: Use normal entries in cbfs

This currently uses _cbfs_entries[] to store entries. Since the entries
are in fact valid etypes, we may as well use the same name as
entry_Section uses, which is _entries. This allows reusing more of the
code there (in a future patch).

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Move cbfs.ObtainContents() down a bit
Simon Glass [Tue, 23 Nov 2021 18:03:50 +0000 (11:03 -0700)]
binman: Move cbfs.ObtainContents() down a bit

It is easier to understand this file if reading the entries comes before
obtaining the contents, since that is the order in which Binman proceeds.
Move the function down a bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Update the section documentation
Simon Glass [Tue, 23 Nov 2021 18:03:49 +0000 (11:03 -0700)]
binman: Update the section documentation

Expand this to explain subclassing better and also to tidy up formatting
for rST.

Fix a few pylint warnings to avoid dropping the score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Allow control of which entries to read
Simon Glass [Tue, 23 Nov 2021 18:03:48 +0000 (11:03 -0700)]
binman: Allow control of which entries to read

The ObtainContents() and GetEntryContents() methods in this file read
every single entry in the section. This is the common case.

However when one of the entries has had its data updated (e.g. with
'binman replace') we don't want to read it again from the file. Allow
the entry to be skipped, for this purpose. This is currently done in the
CBFS implementation, so adding it here will allow that to use more of
the entry_Section code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Allow overriding BuildSectionData()
Simon Glass [Tue, 23 Nov 2021 18:03:47 +0000 (11:03 -0700)]
binman: Allow overriding BuildSectionData()

This method is currently marked private. However it is useful to be able
to subclass it, since much of the entry_Section code can be reused. Rename
it.

Also document one confusing part of this code, so people can understand
how to add a test for this case.

Fix up a few pylint warnings to avoid regressing the score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Drop the filename property in entry_Section
Simon Glass [Tue, 23 Nov 2021 18:03:46 +0000 (11:03 -0700)]
binman: Drop the filename property in entry_Section

This is not used and does nothing. Drop it.

Add a tweak to avoid reducing the pylint score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Drop the underscore in _ReadEntries()
Simon Glass [Tue, 23 Nov 2021 18:03:45 +0000 (11:03 -0700)]
binman: Drop the underscore in _ReadEntries()

This function can be overridden so should not have an underscore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Correct comments for ReadChildData()
Simon Glass [Tue, 23 Nov 2021 18:03:44 +0000 (11:03 -0700)]
binman: Correct comments for ReadChildData()

The comment here is incomplete. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Correct init of entry in Entry class
Simon Glass [Tue, 23 Nov 2021 18:03:43 +0000 (11:03 -0700)]
binman: Correct init of entry in Entry class

This should not have an underscore. Drop it so that derived classes can
rely on it being set correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Add a way to obtain the version
Simon Glass [Tue, 23 Nov 2021 18:03:42 +0000 (11:03 -0700)]
binman: Add a way to obtain the version

Add a -V option which shows the version number of binman. For now this
just uses a local 'version' file. Once the tool is packaged in some way
we can figure out an approach that suits.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agobinman: Tidy up style in cmdline
Simon Glass [Tue, 23 Nov 2021 18:03:41 +0000 (11:03 -0700)]
binman: Tidy up style in cmdline

Update this file to improve the pylint score a little. The remaining item
is:

   Function name "ParseArgs" doesn't conform to snake_case naming style

which needs some binman-wide renaming.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agodtoc: Add support for reading fixed-length bytes properties
Simon Glass [Tue, 23 Nov 2021 18:03:40 +0000 (11:03 -0700)]
dtoc: Add support for reading fixed-length bytes properties

Add functions to read a sequence of bytes from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agodtoc: Add support for reading 64-bit ints
Simon Glass [Tue, 23 Nov 2021 18:03:39 +0000 (11:03 -0700)]
dtoc: Add support for reading 64-bit ints

Add functions to read a 64-bit integer property from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agodtoc: Bring in the libfdt module automatically
Simon Glass [Tue, 23 Nov 2021 18:03:38 +0000 (11:03 -0700)]
dtoc: Bring in the libfdt module automatically

Use the same technique as with binman to load this module from the U-Boot
tree if available. This allows running tests without having to specify
the PYTHONPATH variable.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: replace putchar(ch) by fputc(ch, stdout)
Heinrich Schuchardt [Sat, 20 Nov 2021 12:28:33 +0000 (13:28 +0100)]
sandbox: replace putchar(ch) by fputc(ch, stdout)

When compiled with -Og for better debugability u-boot ends up in a stack
overflow using

    gcc (Ubuntu 11.2.0-7ubuntu2) 11.2.0
    GNU Binutils for Ubuntu 2.37

putchar(ch) is defined as a macro which ends up calling U-Boot's putc()
implementation instead of the glibc one, which calls os_putc() ...

Let's use fputc(ch, stdout) instead as fputc() does not exist in U-Boot.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agodrivers: core: lists: fix for loop index type
Alexander Preißner [Sat, 6 Nov 2021 01:08:59 +0000 (02:08 +0100)]
drivers: core: lists: fix for loop index type

* fixes the bug in function bind_drivers_pass that for
CONFIG_CC_OPTIMIZE_FOR_SIZE=n and no entries in the driver_info list,
i.e. n_ents == 0, the processor steps into the first loop iteration
despite the loop condition being false.
* the Xilinx Zynq-7000 device would eventually hang due to an attempted
access to an invalid memory address
* the bug is fixed by changing the type of idx from uint to int

Board: zynq-zybo
Target: ARM
Compiler: arm-none-eabi-gcc 9.2.1

Signed-off-by: Alexander Preissner <fpga-garage@preissner-muc.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2 years agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net into next
Tom Rini [Thu, 2 Dec 2021 12:16:04 +0000 (07:16 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net into next

- New Broadcom NetXtreme driver
- Support for socat for netconsole
- Felix switch soft reset fix

2 years agoMerge branch '2021-12-01-assorted-updates' into next
Tom Rini [Thu, 2 Dec 2021 12:12:28 +0000 (07:12 -0500)]
Merge branch '2021-12-01-assorted-updates' into next

- Have SPL skip length 0 images, some clean-ups related to CONFIG
  symbols and the known list of unmigrated symbols and pinctrl updates.

2 years agoboard: brcm-ns3: Load netXtreme firmware
Bharat Gooty [Mon, 8 Nov 2021 22:46:11 +0000 (14:46 -0800)]
board: brcm-ns3: Load netXtreme firmware

Load NetXtreme firmware in board_init when BNXT_ETH is selected.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2 years agonet: brcm: netXtreme driver
Bharat Gooty [Mon, 8 Nov 2021 22:46:10 +0000 (14:46 -0800)]
net: brcm: netXtreme driver

Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2 years agodriver: net: Makefile: order file alphabetically
Ramon Fried [Thu, 2 Dec 2021 06:15:27 +0000 (08:15 +0200)]
driver: net: Makefile: order file alphabetically

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2 years agodrivers: net: Soft reset felix switch core
Radu Bulie [Sat, 27 Nov 2021 12:52:35 +0000 (14:52 +0200)]
drivers: net: Soft reset felix switch core

It turns out that in custom designs if the system is reset
multiple times in conjunction with a slight increase in external
temperature, the felix  switch starts to behave in a strange way:
packets are no longer received on the ENECT interface connected
to the L2switch internal port (the TX side of internal port stops working
or the packets do not reach there. It is not very clear where
the packets remain blocked. None of the counters points to a disruption
in the L2switch)
The issue is not reproducible on NXP reference designs.

It was observed that by adding the switch core reset, the problem
goes aways, even if intensive testing in temperature chambers
is applied.

The current patch performs soft reset on the switch core to ensure proper
operation of the L2switch.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2 years agotools/netconsole: Add support for socat
Andy Shevchenko [Wed, 17 Nov 2021 17:15:06 +0000 (20:15 +0300)]
tools/netconsole: Add support for socat

socat is a very powerful tool to work with socets (and not only)
in UNIX systems. Let's add support for it in netconsole.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2 years agospl: fit: Skip attempting to load 0 length image
Nishanth Menon [Tue, 19 Oct 2021 17:32:29 +0000 (12:32 -0500)]
spl: fit: Skip attempting to load 0 length image

When, for various reasons, a bad FIT image is used where a loadable
image is marked as 0 length, attempt is made for a 0 length allocation and
read of 0 byte read operation.

Instead provide warning in log and skip attempting to do such a load.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agodm: add debug message when failed to select the default pinctrl
Patrick Delaunay [Fri, 19 Nov 2021 09:02:27 +0000 (10:02 +0100)]
dm: add debug message when failed to select the default pinctrl

Add a message on probe in driver model core when the default
pinctrl selection failed.

This message is displayed only when the pinctrl API is
implemented, i.e. when result is not ENOSYS.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agopinctrl: change result for unsupported API
Patrick Delaunay [Fri, 19 Nov 2021 09:02:26 +0000 (10:02 +0100)]
pinctrl: change result for unsupported API

Use the return value ENOSYS for unsupported API
- pinctrl_generic_set_state
- pinctrl_select_state

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoscripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt
Patrick Delaunay [Mon, 8 Nov 2021 09:21:22 +0000 (10:21 +0100)]
scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt

The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real
configurations and they are no more present in u-boot.cfg so they can
be removed in config_whitelist.txt.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2 years agoscripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg
Patrick Delaunay [Mon, 8 Nov 2021 09:21:21 +0000 (10:21 +0100)]
scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg

The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in
include/linux/kconfig.h but they are not real configurations; they can
be safely removed in the generated configuration file "u-boot.cfg".

This patch simplifies the comparison of this U-Boot configuration file.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2 years agoMerge branch '2021-12-01-Kconfig-migrations' into next
Tom Rini [Wed, 1 Dec 2021 18:30:59 +0000 (13:30 -0500)]
Merge branch '2021-12-01-Kconfig-migrations' into next

- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND,
  CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of
  CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and
  CONFIG_FSL_DDR_INTERACTIVE.

2 years agoConvert CONFIG_FSL_DDR_BIST et al to Kconfig
Tom Rini [Sun, 14 Nov 2021 00:22:43 +0000 (19:22 -0500)]
Convert CONFIG_FSL_DDR_BIST et al to Kconfig

This converts the following to Kconfig:
   CONFIG_FSL_DDR_BIST
   CONFIG_FSL_DDR_INTERACTIVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoConvert CONFIG_SYS_BR0_PRELIM et al to Kconfig
Tom Rini [Sat, 13 Nov 2021 23:10:40 +0000 (18:10 -0500)]
Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_BR0_PRELIM
   CONFIG_SYS_OR1_PRELIM
   CONFIG_SYS_BR1_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR2_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR3_PRELIM
   CONFIG_SYS_OR3_PRELIM
   CONFIG_SYS_BR4_PRELIM
   CONFIG_SYS_OR4_PRELIM
   CONFIG_SYS_BR5_PRELIM
   CONFIG_SYS_OR5_PRELIM
   CONFIG_SYS_BR6_PRELIM
   CONFIG_SYS_OR6_PRELIM
   CONFIG_SYS_BR7_PRELIM
   CONFIG_SYS_OR7_PRELIM

This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so.  Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoConvert CONFIG_USE_BOOTCOMMAND et al to Kconfig
Tom Rini [Wed, 10 Nov 2021 14:11:40 +0000 (09:11 -0500)]
Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig

This converts the following to Kconfig:
   CONFIG_USE_BOOTCOMMAND
   CONFIG_BOOTCOMMAND
   CONFIG_RAMBOOTCOMMAND
   CONFIG_NFSBOOTCOMMAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoMerge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Wed, 1 Dec 2021 12:22:25 +0000 (07:22 -0500)]
Merge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
  - add DDR read data eye training
  - remove DDR calibration result
  - remove DDR tuning support
  - compute DDR size from DDRCTL registers
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling
  - auto-detect uSD level translator

2 years agoboard: stm32mp1: add support of nor1 device in dfu command
Patrick Delaunay [Thu, 25 Nov 2021 10:54:53 +0000 (11:54 +0100)]
board: stm32mp1: add support of nor1 device in dfu command

Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit e17dc9227c70 ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup
Patrick Delaunay [Wed, 24 Nov 2021 09:52:19 +0000 (10:52 +0100)]
ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup

Since the commit 73efa9f897f9 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoram: stm32mp1: compute DDR size from DDRCTL registers
Patrick Delaunay [Wed, 24 Nov 2021 09:52:18 +0000 (10:52 +0100)]
ram: stm32mp1: compute DDR size from DDRCTL registers

Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.

This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoconfigs: stm32mp15: deactivate the CONFIG_STM32_IPCC
Patrick Delaunay [Fri, 19 Nov 2021 09:07:32 +0000 (10:07 +0100)]
configs: stm32mp15: deactivate the CONFIG_STM32_IPCC

The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.

So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoboard: stm32mp1: enable simple framebuffer node for splashscreen
Patrick Delaunay [Mon, 15 Nov 2021 15:32:23 +0000 (16:32 +0100)]
board: stm32mp1: enable simple framebuffer node for splashscreen

Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.

These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agovideo: stm32: stm32_ltdc: align framebuffer on 2MB
Patrick Delaunay [Mon, 15 Nov 2021 15:32:22 +0000 (16:32 +0100)]
video: stm32: stm32_ltdc: align framebuffer on 2MB

Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for
LPAE for armV7, to avoid issue with the simple frame buffer activation,
when U-Boot add a reserved memory in the kernel device tree to preserve
the splash screen until Linux driver initialization.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agocommon: add fdt_simplefb_enable_and_mem_rsv function
Patrick Delaunay [Mon, 15 Nov 2021 15:32:21 +0000 (16:32 +0100)]
common: add fdt_simplefb_enable_and_mem_rsv function

Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.

This device tree update is only done when the video device is active
and the video buffer is used.

This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO
is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agovideo: Add video_is_active function
Patrick Delaunay [Mon, 15 Nov 2021 15:32:20 +0000 (16:32 +0100)]
video: Add video_is_active function

Add the helper function video_is_active() to test if one video device
is active.

This function can be used in board code to execute operation
only when the display is probed / really used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agocommon: rename functions lcd_dt_simplefb to fdt_simplefb
Patrick Delaunay [Mon, 15 Nov 2021 15:32:19 +0000 (16:32 +0100)]
common: rename functions lcd_dt_simplefb to fdt_simplefb

Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2 years agocommon: rename lcd_simplefb.c file to fdt_simplefb.c
Patrick Delaunay [Mon, 15 Nov 2021 15:32:18 +0000 (16:32 +0100)]
common: rename lcd_simplefb.c file to fdt_simplefb.c

Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned
with the configuration name and with the associated include file
./include/fdt_simplefb.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoConvert CONFIG_LCD_DT_SIMPLEFB to Kconfig
Patrick Delaunay [Mon, 15 Nov 2021 15:32:17 +0000 (16:32 +0100)]
Convert CONFIG_LCD_DT_SIMPLEFB to Kconfig

This converts the following to Kconfig:
   CONFIG_LCD_DT_SIMPLEFB

This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2 years agostm32mp1: ram: remove tuning support
Patrick Delaunay [Mon, 15 Nov 2021 14:32:30 +0000 (15:32 +0100)]
stm32mp1: ram: remove tuning support

Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.

Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agostm32mp1: ram: remove the support of calibration result
Patrick Delaunay [Mon, 15 Nov 2021 14:32:29 +0000 (15:32 +0100)]
stm32mp1: ram: remove the support of calibration result

The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agostm32mp1: ram: add read valid training support
Patrick Delaunay [Mon, 15 Nov 2021 14:32:28 +0000 (15:32 +0100)]
stm32mp1: ram: add read valid training support

Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.

This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: stm32: Auto-detect DHSOM with uSD level translator
Marek Vasut [Sat, 13 Nov 2021 02:29:44 +0000 (03:29 +0100)]
ARM: dts: stm32: Auto-detect DHSOM with uSD level translator

The uSD level translator on DHSOM and Avenger96 are optional, however it
is possible to auto-detect it. This is done by setting SD CMD line high,
and then testing whether signal level on CK line matches the signal level
on CKIN line. If so, the uSD level translator is present, otherwise it is
not populated.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agommc: stm32_sdmmc2: Add support for probing bus voltage level translator
Marek Vasut [Sat, 13 Nov 2021 02:29:43 +0000 (03:29 +0100)]
mmc: stm32_sdmmc2: Add support for probing bus voltage level translator

Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.

The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
2 years agoARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Marek Vasut [Sat, 13 Nov 2021 02:28:03 +0000 (03:28 +0100)]
ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR

Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add custom PHY reset bindings on AV96
Marek Vasut [Sat, 13 Nov 2021 02:27:37 +0000 (03:27 +0100)]
ARM: dts: stm32: Add custom PHY reset bindings on AV96

The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:26:39 +0000 (03:26 +0100)]
ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM

The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:26:05 +0000 (03:26 +0100)]
ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM

The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:25:13 +0000 (03:25 +0100)]
ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM

Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: stm32: Increase USB power-good delay on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:24:44 +0000 (03:24 +0100)]
ARM: stm32: Increase USB power-good delay on DHSOM

The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agopinctrl: stmfx: define LOG_CATEGORY
Patrick Delaunay [Wed, 10 Nov 2021 17:14:10 +0000 (18:14 +0100)]
pinctrl: stmfx: define LOG_CATEGORY

Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:20 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:19 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:18 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:17 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:16 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:15 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:14 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:13 +0000 (11:39 +0100)]
ARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>