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23 months agofeat(imx8mq): remove empty bl31_plat_runtime_setup
Lucas Stach [Thu, 8 Dec 2022 16:51:17 +0000 (17:51 +0100)]
feat(imx8mq): remove empty bl31_plat_runtime_setup

Having this empty definition is actively harmful, as it prevents the
default weak function to be used, which does a switch of the console
state.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I3b78e0c524c4907714036dba573a44d8f9c48b09

23 months agofeat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter
Lucas Stach [Thu, 8 Dec 2022 14:54:26 +0000 (15:54 +0100)]
feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

This aligns the i.MX8MQ build with the other i.MX8M platforms by
allowing to override the default IMX_BOOT_UART_BASE value via a make
parameter.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Iad9b844517209fc7d051c61767f71ac9fa2b55c7

23 months agoMerge changes Ida9abfd5,Iec447d97 into integration
Sandrine Bailleux [Wed, 7 Dec 2022 12:51:57 +0000 (13:51 +0100)]
Merge changes Ida9abfd5,Iec447d97 into integration

* changes:
  build: enable adding MbedTLS files for platform
  feat(lib/psa): add read_measurement API

23 months agoMerge "fix(trp): preserve RMI SMC X4 when not used as return" into integration
Soby Mathew [Wed, 7 Dec 2022 11:14:56 +0000 (12:14 +0100)]
Merge "fix(trp): preserve RMI SMC X4 when not used as return" into integration

23 months agofix(trp): preserve RMI SMC X4 when not used as return
AlexeiFedorov [Thu, 24 Nov 2022 13:42:44 +0000 (13:42 +0000)]
fix(trp): preserve RMI SMC X4 when not used as return

This patch adds X2-X6 and 'smc_ret' parameters to trp_rmi_handler().
The last 'smc_ret' parameter passed in X7 contains address of
'trp_smc_result' structure on stack to return result of RMI SMC call.

This allows to preserve X4 if not used as a return argument as per
SMCCCv1.2. The patch also removes use of trp_args_t in RMI handling.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I9e3387a7380b37863eeccc53d13e92e0ac5cffbd

23 months agoMerge "feat(rmm): add support for the 2nd DRAM bank" into integration
Soby Mathew [Wed, 7 Dec 2022 05:03:38 +0000 (06:03 +0100)]
Merge "feat(rmm): add support for the 2nd DRAM bank" into integration

23 months agoMerge "feat(intel): extending to support SMMU in FCS" into integration
Sandrine Bailleux [Tue, 6 Dec 2022 16:27:17 +0000 (17:27 +0100)]
Merge "feat(intel): extending to support SMMU in FCS" into integration

23 months agoMerge "fix(intel): fix fcs_client crashed when increased param size" into integration
Sandrine Bailleux [Tue, 6 Dec 2022 16:27:07 +0000 (17:27 +0100)]
Merge "fix(intel): fix fcs_client crashed when increased param size" into integration

23 months agoMerge changes Ia8f1471a,I6b95c19d into integration
Sandrine Bailleux [Tue, 6 Dec 2022 16:26:22 +0000 (17:26 +0100)]
Merge changes Ia8f1471a,I6b95c19d into integration

* changes:
  fix(intel): agilex bitstream pre-authenticate
  fix(intel): mailbox store QSPI ref clk in scratch reg

23 months agoMerge "fix(rss): do not consider MHU_ERR_ALREADY_INIT as error" into integration
Sandrine Bailleux [Tue, 6 Dec 2022 14:55:28 +0000 (15:55 +0100)]
Merge "fix(rss): do not consider MHU_ERR_ALREADY_INIT as error" into integration

23 months agofeat(rmm): add support for the 2nd DRAM bank
AlexeiFedorov [Tue, 29 Nov 2022 13:32:41 +0000 (13:32 +0000)]
feat(rmm): add support for the 2nd DRAM bank

This patch adds support for RMM granules allocation
in FVP 2nd DRAM 2GB bank at 0x880000000 base address.
For ENABLE_RME = 1 case it also removes "mem=1G"
Linux kernel command line option in fvp-base-psci-common.dsti
to allow memory layout discovery from the FVP device tree.
FVP parameter 'bp.dram_size' - size of main memory in gigabytes
documented in docs/components/realm-management-extension.rst
is changed from 2 to 4.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I174da4416ad5a8d41bf0ac89f356dba7c0cd3fe7

23 months agofix(rss): do not consider MHU_ERR_ALREADY_INIT as error
David Vincze [Thu, 1 Dec 2022 14:10:34 +0000 (15:10 +0100)]
fix(rss): do not consider MHU_ERR_ALREADY_INIT as error

rss_comms_init() should return with success (0) in case of an internal
MHU_ERR_ALREADY_INIT error code which is harmless (occurs when
rss_comms_init() is called multiple times in a row).

Change-Id: Ibb1fef48a60866e80d3a389128cb8eef1332ea01
Signed-off-by: David Vincze <david.vincze@arm.com>
23 months agoMerge "feat(qemu): support pointer authentication" into integration
Manish Pandey [Tue, 6 Dec 2022 09:19:40 +0000 (10:19 +0100)]
Merge "feat(qemu): support pointer authentication" into integration

23 months agoMerge "refactor(arm): remove unused global" into integration
Sandrine Bailleux [Tue, 6 Dec 2022 08:55:23 +0000 (09:55 +0100)]
Merge "refactor(arm): remove unused global" into integration

23 months agofix(intel): fix fcs_client crashed when increased param size
Jit Loon Lim [Tue, 13 Sep 2022 02:24:04 +0000 (10:24 +0800)]
fix(intel): fix fcs_client crashed when increased param size

No overflow buffer checking for param size. There is a security threat.
Update code to check for param size according to cryto param mode.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I37a2d047edd9ff835b3f0986d85309c402887bef

23 months agofeat(intel): extending to support SMMU in FCS
Sieu Mun Tang [Wed, 28 Sep 2022 07:58:28 +0000 (15:58 +0800)]
feat(intel): extending to support SMMU in FCS

This patch is to extend support SMMU in FCS GET_DIGEST, MAC_VERIFY,
ECDSA_SHA2_DATA_SIGNING and ECDSA_SHA2_DATA_SIGNATURE_VERIFY.
It also will change to use asynchronous mailbox send command to improve
fcs_client timing performance.
Increase the SIP_SVC_VERSION_MAJOR because SMMU support is not backward
compatible.
Increase the SIP_SVC_VERSION_MINOR because 8 news function IDs are
introduced.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I15e619e246531b065451f9b201646f3c50e26307

23 months agorefactor(arm): remove unused global
Manish V Badarkhe [Sun, 4 Dec 2022 20:43:45 +0000 (20:43 +0000)]
refactor(arm): remove unused global

Removed unused global from the assembly file.

Change-Id: I17ab70aa888af27865a9fb4436495197f460780f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
23 months agoMerge "fix(zynqmp): initialize uint32 with value 0U in pm code" into integration
Joanna Farley [Thu, 1 Dec 2022 17:50:50 +0000 (18:50 +0100)]
Merge "fix(zynqmp): initialize uint32 with value 0U in pm code" into integration

23 months agoMerge "fix(el3_runtime): restore SPSR/ELR/SCR after esb" into integration
Manish Pandey [Thu, 1 Dec 2022 15:31:19 +0000 (16:31 +0100)]
Merge "fix(el3_runtime): restore SPSR/ELR/SCR after esb" into integration

23 months agofix(zynqmp): initialize uint32 with value 0U in pm code
Naman Patel [Thu, 1 Dec 2022 10:58:46 +0000 (02:58 -0800)]
fix(zynqmp): initialize uint32 with value 0U in pm code

MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection tool is not reporting this as
warning. It reports only when the initialized value exceeds the
range of data type based on compiler used.

But, this change is added as a part of precaution as some other
misra checker tool may report it as violation of rule 7.2.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I50a5cee2a077fe157e79757d959ce33064225af3

23 months agoMerge "build: restrict usage of CTX_INCLUDE_EL2_REGS" into integration
Manish Pandey [Thu, 1 Dec 2022 10:08:07 +0000 (11:08 +0100)]
Merge "build: restrict usage of CTX_INCLUDE_EL2_REGS" into integration

23 months agobuild: restrict usage of CTX_INCLUDE_EL2_REGS
Govindraj Raja [Mon, 21 Nov 2022 13:10:40 +0000 (13:10 +0000)]
build: restrict usage of CTX_INCLUDE_EL2_REGS

CTX_INCLUDE_EL2_REGS is used to save/restore EL2 registers and
it should be only used when there is SPMD or RME enabled.

Make CTX_INCLUDE_EL2_REGS an internal macro and remove
from documentation.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I6a70edfd88163423ff0482de094601cf794246d6

23 months agofix(el3_runtime): restore SPSR/ELR/SCR after esb
Manish Pandey [Thu, 17 Nov 2022 14:43:15 +0000 (14:43 +0000)]
fix(el3_runtime): restore SPSR/ELR/SCR after esb

SCR_EL3 register is restored before esb issued and it is assumed
that EAs are unmasked at that point, which is wrong, as the SCR_EL3
value at that time is restored from the context of the world where
it is returning to.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Id1c7150a70b5f589b0dc7c50c359b4d23ee9f256

23 months agoMerge changes from topic "mb/refactor-evlog" into integration
Manish Pandey [Wed, 30 Nov 2022 13:17:08 +0000 (14:17 +0100)]
Merge changes from topic "mb/refactor-evlog" into integration

* changes:
  refactor(qemu): pass platform metadata as a function's argument
  refactor(imx8m): pass platform metadata as a function's argument
  refactor(fvp): pass platform metadata as a function's argument
  refactor(measured-boot): accept metadata as a function's argument

23 months agoMerge "fix(console): fix crash on spin_unlock with cache disabled" into integration
Manish Pandey [Tue, 29 Nov 2022 09:32:46 +0000 (10:32 +0100)]
Merge "fix(console): fix crash on spin_unlock with cache disabled" into integration

23 months agofix(console): fix crash on spin_unlock with cache disabled
Baruch Siach [Thu, 24 Nov 2022 08:34:06 +0000 (10:34 +0200)]
fix(console): fix crash on spin_unlock with cache disabled

Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that x0
points to.

Move spinlock address load earlier so that x0 is always valid on
spin_unlock call.

Change-Id: Iac640289725dce2518f2fed483d7d36ca748ffe8
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
23 months agoMerge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration
Lauren Wehrmeister [Mon, 28 Nov 2022 17:15:06 +0000 (18:15 +0100)]
Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration

23 months agoMerge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration
Sandrine Bailleux [Mon, 28 Nov 2022 14:08:25 +0000 (15:08 +0100)]
Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration

23 months agoMerge changes I8667f362,Ia0bd832c into integration
Sandrine Bailleux [Mon, 28 Nov 2022 14:07:11 +0000 (15:07 +0100)]
Merge changes I8667f362,Ia0bd832c into integration

* changes:
  feat(intel): setup FPGA interface for Agilex
  fix(intel): fix pinmux handoff bug on Agilex

23 months agoMerge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration
Sandrine Bailleux [Mon, 28 Nov 2022 14:03:16 +0000 (15:03 +0100)]
Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration

23 months agoMerge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration
Sandrine Bailleux [Mon, 28 Nov 2022 14:02:41 +0000 (15:02 +0100)]
Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration

23 months agofeat(qemu): support pointer authentication
Leo Yan [Wed, 16 Nov 2022 08:34:50 +0000 (16:34 +0800)]
feat(qemu): support pointer authentication

This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5baffd7d0ccfe83e3b28f910ae1

23 months agoMerge "fix(rss): remove null-terminator from RSS metadata" into integration
Sandrine Bailleux [Mon, 28 Nov 2022 11:46:56 +0000 (12:46 +0100)]
Merge "fix(rss): remove null-terminator from RSS metadata" into integration

23 months agofix(rss): remove null-terminator from RSS metadata
David Vincze [Fri, 4 Nov 2022 17:28:12 +0000 (18:28 +0100)]
fix(rss): remove null-terminator from RSS metadata

Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated length value which
should not include a null-terminator when storing the
measurement.

Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb
Signed-off-by: David Vincze <david.vincze@arm.com>
23 months agoMerge "fix(zynqmp): check return status of pm_get_api_version" into integration
Joanna Farley [Fri, 25 Nov 2022 15:25:53 +0000 (16:25 +0100)]
Merge "fix(zynqmp): check return status of pm_get_api_version" into integration

23 months agoMerge "fix(versal): initialize the variable with value 0 in pm code" into integration
Joanna Farley [Fri, 25 Nov 2022 15:24:53 +0000 (16:24 +0100)]
Merge "fix(versal): initialize the variable with value 0 in pm code" into integration

23 months agobuild: enable adding MbedTLS files for platform
Mate Toth-Pal [Sat, 5 Nov 2022 20:20:10 +0000 (21:20 +0100)]
build: enable adding MbedTLS files for platform

The platform.mk can add extra MbedTLS source files to LIBMBEDTLS_SRC.

Change-Id: Ida9abfd59d8b02eae23ec0a7f326db060b42bf49
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
23 months agofeat(lib/psa): add read_measurement API
Mate Toth-Pal [Mon, 24 Oct 2022 13:15:10 +0000 (15:15 +0200)]
feat(lib/psa): add read_measurement API

This API is added for testing purposes. It makes possible to write test
cases that read measurements back after extending them, and compare
them to expected results.

Change-Id: Iec447d972fdd54a56ab933a065476e0f4d35a6fc
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
2 years agofix(zynqmp): check return status of pm_get_api_version
Naman Patel [Tue, 22 Nov 2022 13:01:37 +0000 (05:01 -0800)]
fix(zynqmp): check return status of pm_get_api_version

MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252

2 years agofix(versal): initialize the variable with value 0 in pm code
Naman Patel [Wed, 16 Nov 2022 09:54:23 +0000 (01:54 -0800)]
fix(versal): initialize the variable with value 0 in pm code

Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd

2 years agoMerge "feat(qemu): increase size of bl2" into integration
Manish Pandey [Thu, 24 Nov 2022 10:41:08 +0000 (11:41 +0100)]
Merge "feat(qemu): increase size of bl2" into integration

2 years agoMerge "fix(docs): deprecate plat_convert_pk() in v2.9" into integration
Joanna Farley [Tue, 22 Nov 2022 16:07:05 +0000 (17:07 +0100)]
Merge "fix(docs): deprecate plat_convert_pk() in v2.9" into integration

2 years agofix(intel): agilex bitstream pre-authenticate
Jit Loon Lim [Thu, 3 Nov 2022 12:03:37 +0000 (20:03 +0800)]
fix(intel): agilex bitstream pre-authenticate

HSD #15012010816: To add in bitstream pre-authentication checking.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia8f1471a674ba16972927084f5fdc27c4ba93103

2 years agofix(intel): mailbox store QSPI ref clk in scratch reg
Jit Loon Lim [Fri, 19 Aug 2022 11:40:17 +0000 (13:40 +0200)]
fix(intel): mailbox store QSPI ref clk in scratch reg

When HPS requests QSPI controller access the SDM returns the QSPI
reference clock frequency. Store the provided reference clock frequency
(in kHz) in BOOT_SCRATCH_COLD_0 register (bits [27:0]) as u-boot
QSPI driver expects this.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6b95c19db602387a79ff10abdebbc57abb0c07ff

2 years agofix(intel): remove checking on TEMP and VOLT checking for HWMON
Jit Loon Lim [Thu, 6 Oct 2022 02:52:40 +0000 (10:52 +0800)]
fix(intel): remove checking on TEMP and VOLT checking for HWMON

Remove high level logic hardware channel checking on HWMON
TEMP and VOLT read.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I9102b7b4334cb95f0b622c498a6569328f534d42

2 years agofix(intel): fix sp_timer0 is not disabled in firewall on Agilex
Jit Loon Lim [Tue, 20 Sep 2022 02:41:37 +0000 (10:41 +0800)]
fix(intel): fix sp_timer0 is not disabled in firewall on Agilex

sp_timer0 is not disabled in firewall on Agilex causing Zephyr is facing
issue to access the timer.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I0099e200d6c9ca435f46393c6ed9cbe387870af0

2 years agofeat(intel): setup FPGA interface for Agilex
Jit Loon Lim [Wed, 15 Jun 2022 12:59:33 +0000 (14:59 +0200)]
feat(intel): setup FPGA interface for Agilex

Enable/Disable FPGA interfaces based on handoff configuration.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I8667f362aa53e7c68723e0dbd5284844ae39dfb5

2 years agofix(intel): fix pinmux handoff bug on Agilex
Jit Loon Lim [Thu, 16 Jun 2022 20:54:01 +0000 (22:54 +0200)]
fix(intel): fix pinmux handoff bug on Agilex

Incorrect number of FPGA pinmux registers was copied from handoff data.
This caused pinmux_emac0_usefpga register to always be zero meaning
"EMAC0 uses HPS IO Pins" even if handoff data for this register was one
meaning "EMAC0 uses the FPGA Inteface".

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia0bd832c61d25f66ef13f39fe28b054cb96af9a1

2 years agofix(intel): fix print out ERROR when encounter SEU_Err
Sieu Mun Tang [Tue, 22 Nov 2022 15:22:45 +0000 (23:22 +0800)]
fix(intel): fix print out ERROR when encounter SEU_Err

Print out ERROR message when system face encounter SEU_ERR

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I744afbca23b74b164e47472039b5d6fbe5c3c764

2 years agofix(docs): deprecate plat_convert_pk() in v2.9
Yann Gautier [Tue, 22 Nov 2022 13:05:03 +0000 (14:05 +0100)]
fix(docs): deprecate plat_convert_pk() in v2.9

The deprecation was tagged "Next release after 2.8". Now there is a 2.9
planned, directly use this version.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0727eebc4a3800dafafc4166b0c2c40a12c90b4b

2 years agorefactor(qemu): pass platform metadata as a function's argument
Manish V Badarkhe [Fri, 18 Nov 2022 20:43:07 +0000 (20:43 +0000)]
refactor(qemu): pass platform metadata as a function's argument

Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I9d8316914c046f47cdc6875b16649479e82087aa
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2 years agorefactor(imx8m): pass platform metadata as a function's argument
Manish V Badarkhe [Fri, 18 Nov 2022 20:42:44 +0000 (20:42 +0000)]
refactor(imx8m): pass platform metadata as a function's argument

Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I4b98b6a035abb28c000344f2dbeb3996c69eee61
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2 years agorefactor(fvp): pass platform metadata as a function's argument
Manish V Badarkhe [Fri, 18 Nov 2022 20:27:21 +0000 (20:27 +0000)]
refactor(fvp): pass platform metadata as a function's argument

Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: Id1bf59c243c483d7e32152f094c693e95d29fe2b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2 years agorefactor(measured-boot): accept metadata as a function's argument
Manish V Badarkhe [Fri, 18 Nov 2022 18:30:08 +0000 (18:30 +0000)]
refactor(measured-boot): accept metadata as a function's argument

Updated the event log driver's function to accept metadata as an
argument, to remove the platform function usage from the event log
driver to make it a standalone driver.

Change-Id: I512cf693d51dc3c0b9d2c1bfde4f89414e273049
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2 years agoMerge "docs(spm): update threat model" into integration
Manish Pandey [Mon, 21 Nov 2022 18:12:00 +0000 (19:12 +0100)]
Merge "docs(spm): update threat model" into integration

2 years agoMerge "docs(qemu): document steps to run in OpenCI" into integration
Manish Pandey [Mon, 21 Nov 2022 17:55:23 +0000 (18:55 +0100)]
Merge "docs(qemu): document steps to run in OpenCI" into integration

2 years agodocs(spm): update threat model
Madhukar Pappireddy [Fri, 14 Oct 2022 21:06:00 +0000 (16:06 -0500)]
docs(spm): update threat model

Update SPM threat model for possible threats, from malicious
endpoints, related to interrupt management. The mitigations
are based on the guidance provided in FF-A v1.1 EAC0 spec.

Change-Id: Ib9e26e3f1c60fe3a2734a67de1dcf1cea4883d38
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2 years agodocs(qemu): document steps to run in OpenCI
Harrison Mutai [Tue, 15 Nov 2022 18:28:18 +0000 (18:28 +0000)]
docs(qemu): document steps to run in OpenCI

Add details on how to run QEMU in OpenCI, and what tests are currently
supported.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I291e4eb64a58c766519ff7dcac4841ae75c3934e

2 years agoMerge "fix(intel): fix UART baud rate and clock" into integration
Sandrine Bailleux [Mon, 21 Nov 2022 13:57:10 +0000 (14:57 +0100)]
Merge "fix(intel): fix UART baud rate and clock" into integration

2 years agofix(intel): fix UART baud rate and clock
Sieu Mun Tang [Fri, 1 Jul 2022 01:08:57 +0000 (09:08 +0800)]
fix(intel): fix UART baud rate and clock

Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353

2 years agoMerge "docs(changelog): changelog for v2.8 release" into integration
Manish Pandey [Fri, 18 Nov 2022 17:28:52 +0000 (18:28 +0100)]
Merge "docs(changelog): changelog for v2.8 release" into integration

2 years agoMerge "fix(docs): add v2.9 release schedule" into integration
Joanna Farley [Fri, 18 Nov 2022 16:47:14 +0000 (17:47 +0100)]
Merge "fix(docs): add v2.9 release schedule" into integration

2 years agofix(docs): add v2.9 release schedule
Joanna Farley [Fri, 18 Nov 2022 00:33:16 +0000 (02:33 +0200)]
fix(docs): add v2.9 release schedule

Signed-off-by: Joanna Farley <Joanna.Farley@arm.com>
Change-Id: I082461d7d21f63e3b8cbee37e8f01b8128e4b5a0

2 years agoMerge changes I97687f18,I91d5718b into integration
Olivier Deprez [Thu, 17 Nov 2022 10:14:05 +0000 (11:14 +0100)]
Merge changes I97687f18,I91d5718b into integration

* changes:
  docs(spm): interrupt handling guidance FF-A v1.1 EAC0
  docs(spm): partition runtime model and schedule modes

2 years agofix(cpus): workaround for Cortex-X3 erratum 2615812
Harrison Mutai [Fri, 11 Nov 2022 14:09:55 +0000 (14:09 +0000)]
fix(cpus): workaround for Cortex-X3 erratum 2615812

Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1, and is still open. The workaround is to disable
the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in CORTEX_X3_IMP_CPUPWRCTLR_EL1 to 0b000).

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest

Change-Id: I5ad66df3e18fc85a6b23f6662239494ee001d82f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2 years agoMerge changes from topic "ja/spm_doc" into integration
Olivier Deprez [Thu, 17 Nov 2022 09:04:49 +0000 (10:04 +0100)]
Merge changes from topic "ja/spm_doc" into integration

* changes:
  docs(spm): ff-a v1.1 indirect message
  docs(spm): s-el0 partition support update

2 years agofeat(qemu): increase size of bl2
Leo Yan [Wed, 16 Nov 2022 06:52:50 +0000 (14:52 +0800)]
feat(qemu): increase size of bl2

Increases BL2 size to have room to enable security features (like
measurement and TPM).

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: Iba5e8923e2e154315499e9bfce2e0aff0ccc8f95

2 years agodocs(spm): interrupt handling guidance FF-A v1.1 EAC0
Madhukar Pappireddy [Mon, 3 Oct 2022 23:09:32 +0000 (18:09 -0500)]
docs(spm): interrupt handling guidance FF-A v1.1 EAC0

This patch documents the actions taken by Hafnium SPMC in response
to non-secure and secure interrupts.

Change-Id: I97687f188ca97aeb255e3e5b55d44ddf5d66b6e0
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2 years agodocs(changelog): changelog for v2.8 release
laurenw-arm [Tue, 15 Nov 2022 16:15:34 +0000 (10:15 -0600)]
docs(changelog): changelog for v2.8 release

Change-Id: I1d99ea46ad527993ee786c34a67f94d74470f960
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2 years agodocs(spm): partition runtime model and schedule modes
Madhukar Pappireddy [Mon, 3 Oct 2022 19:26:48 +0000 (14:26 -0500)]
docs(spm): partition runtime model and schedule modes

This patch documents the support for partition runtime models, call
chains and schedule modes in Hafnium SPMC.

Change-Id: I91d5718bb2c21d475499e402f6f27076930336cb
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2 years agoMerge "docs(marvell): fix typo 8K => A8K" into integration
Madhukar Pappireddy [Wed, 16 Nov 2022 17:13:48 +0000 (18:13 +0100)]
Merge "docs(marvell): fix typo 8K => A8K" into integration

2 years agodocs(spm): ff-a v1.1 indirect message
J-Alves [Wed, 26 Oct 2022 12:46:37 +0000 (13:46 +0100)]
docs(spm): ff-a v1.1 indirect message

Update secure partition manager documentation to include
FF-A v1.1 indirect messaging implementation.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Ifbca45347f775080ef98ac896d31650204318ba4

2 years agoMerge changes If90a18ee,I02e88f8c,Iea447fb5,Ie0570481,Ieeb14cfc into integration
Manish V Badarkhe [Wed, 16 Nov 2022 15:18:54 +0000 (16:18 +0100)]
Merge changes If90a18ee,I02e88f8c,Iea447fb5,Ie0570481,Ieeb14cfc into integration

* changes:
  docs: add top level section numbering
  docs(build): clarify getting started section
  docs(build): clarify docs building instructions
  fix(docs): prevent a sphinx warning
  fix(docs): prevent a virtual environment from failing a build

2 years agoMerge "docs(spm): update FF-A manifest binding" into integration
Olivier Deprez [Wed, 16 Nov 2022 14:39:08 +0000 (15:39 +0100)]
Merge "docs(spm): update FF-A manifest binding" into integration

2 years agodocs: add top level section numbering
Boyan Karatotev [Thu, 27 Oct 2022 14:12:36 +0000 (15:12 +0100)]
docs: add top level section numbering

Top level sections are not numbered. Adding numbers makes referring to
sections easier. For example the Maintainers page changes from
"about/3.1" to simply "1.3.1".

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If90a18ee8d6a6858d58f0687f31ea62b69399e04

2 years agodocs(build): clarify getting started section
Boyan Karatotev [Thu, 27 Oct 2022 13:47:18 +0000 (14:47 +0100)]
docs(build): clarify getting started section

The Getting started section is very difficult to follow. Building the
fip comes before building the files it needs, the BL33 requirement is
given in a somewhat hand wavy way, and the Arm Developer website
download provides a lot of targets and the guide is not clear which ones
are needed on download.

Swapping the initial build and supporting tools sections makes the flow
more natural and the supporting tools section then becomes clear.
Explicitly mentioning the GCC targets avoids confusion for people less
familiar with the project (eg. new starters).

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I02e88f8c279db6d8eda68f634e8473c02b733963

2 years agodocs(build): clarify docs building instructions
Boyan Karatotev [Thu, 27 Oct 2022 12:55:12 +0000 (13:55 +0100)]
docs(build): clarify docs building instructions

Using virtual environments with pip is a generally recommended good
practice but the docs do not acknowledge it. As a result fresh installs
might fail builds due to missing $PATH entries. The Prerequisites
section is also a bit verbose which is difficult to read.

This patch adds the virtual environment mention and clarifies wording.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iea447fb59dc471a502454650c8548192d93ba879

2 years agofix(docs): prevent a sphinx warning
Boyan Karatotev [Thu, 27 Oct 2022 10:56:40 +0000 (11:56 +0100)]
fix(docs): prevent a sphinx warning

Some newer versions of sphinx (tried on v5.3) will warn about language
being None which will fail the build. Change it to the default (en) to
prevent this.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ie0570481f42aeb293e885ca936e0765f6cb299a8

2 years agofix(docs): prevent a virtual environment from failing a build
Boyan Karatotev [Thu, 27 Oct 2022 10:28:23 +0000 (11:28 +0100)]
fix(docs): prevent a virtual environment from failing a build

sphinx-build is passed a blanket "." to build all docs. However, if a
virtual environment is placed within the docs directory, sphinx will try
to build it which will fail due to some weird files it has.

This excludes the most common virtual environment directories from the
build to prevent this.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ieeb14cfc5730d21c986611feb0ed379c58dfcae2

2 years agoMerge "fix(zynqmp): resolve coverity warnings" into integration
Joanna Farley [Wed, 16 Nov 2022 00:04:17 +0000 (01:04 +0100)]
Merge "fix(zynqmp): resolve coverity warnings" into integration

2 years agofix(zynqmp): resolve coverity warnings
HariBabu Gattem [Fri, 7 Oct 2022 07:07:49 +0000 (00:07 -0700)]
fix(zynqmp): resolve coverity warnings

Fix for coverity issues in pm_service component.
Fixed compilation error for versal platform.

Change-Id: I948f01807e67ad1e41021557e040dcbfb7b3a39e
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Signed-off-by: Naman Patel <naman.patel@amd.com>
2 years agoMerge "fix(docs): unify referenced Ubuntu versions" into integration
Madhukar Pappireddy [Tue, 15 Nov 2022 21:25:46 +0000 (22:25 +0100)]
Merge "fix(docs): unify referenced Ubuntu versions" into integration

2 years agofix(docs): unify referenced Ubuntu versions
Boyan Karatotev [Tue, 15 Nov 2022 17:39:22 +0000 (17:39 +0000)]
fix(docs): unify referenced Ubuntu versions

Documentation is inconsistent when referring to Ubuntu versioning.
Change this to a single reference that is consistent with the stated
version for TF-A tests.

The change was tested with a full build on a clean install of Ubuntu 20.04.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ibb135ed938e9d92332668fa5caf274cf61b822d3

2 years agoMerge "fix(rockchip): align fdt buffer on 8 bytes" into integration
Manish Pandey [Tue, 15 Nov 2022 11:18:39 +0000 (12:18 +0100)]
Merge "fix(rockchip): align fdt buffer on 8 bytes" into integration

2 years agodocs(spm): s-el0 partition support update
J-Alves [Wed, 26 Oct 2022 10:00:28 +0000 (11:00 +0100)]
docs(spm): s-el0 partition support update

S-EL0 partitions already support indirect messaging and notifications
so add that to supported features.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I08e04593653ba38a2b82395f6f2d3ca7b212d494

2 years agofix(rockchip): align fdt buffer on 8 bytes
Quentin Schulz [Mon, 14 Nov 2022 16:40:33 +0000 (17:40 +0100)]
fix(rockchip): align fdt buffer on 8 bytes

Since commit 94b2f94bd632 ("feat(libfdt): upgrade libfdt source files"),
8-byte alignment of the FDT address is enforced to follow the DT
standard.

Rockchip implementation of params_early_setup loads the FDT address as
passed by the bootloader into a buffer. This buffer is currently made of
uint8_t which means it is not 8-byte aligned and might result in
fdt_open_into failing.

Instead, let's make this buffer uint64_t to make it 8-byte aligned.

Cc: Quentin Schulz <foss+tf-a@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Change-Id: Ifcf0e0cf4000e3661d76d3c3a2fe3921f7fe44b9

2 years agoMerge changes I256959d7,I721376bf into integration
Manish Pandey [Mon, 14 Nov 2022 14:54:27 +0000 (15:54 +0100)]
Merge changes I256959d7,I721376bf into integration

* changes:
  fix(cpus): remove plat_can_cmo check for aarch32
  fix(cpus): update doc and check for plat_can_cmo

2 years agoMerge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration
Manish Pandey [Mon, 14 Nov 2022 14:40:06 +0000 (15:40 +0100)]
Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration

2 years agofix(cpus): remove plat_can_cmo check for aarch32
Okash Khawaja [Mon, 14 Nov 2022 13:02:12 +0000 (13:02 +0000)]
fix(cpus): remove plat_can_cmo check for aarch32

We don't need CONDITIONAL_CMO for aarch32 so let's remove it.

Signed-off-by: Okash Khawawja <okash@google.com>
Change-Id: I256959d7005df21a850ff7791c8188ea01f5c53b

2 years agofix(cpus): update doc and check for plat_can_cmo
Okash Khawaja [Mon, 14 Nov 2022 12:50:30 +0000 (12:50 +0000)]
fix(cpus): update doc and check for plat_can_cmo

plat_can_cmo must not clobber x1 but the doc doesn't mention that. This
patch updates the doc to mention x1. It also adds check for plat_can_cmo
to `dcsw_op_louis` which was missed out in original patch.

Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I721376bf3726520d0d5b0df0f33f98ce92257287

2 years agorefactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
Yann Gautier [Mon, 14 Nov 2022 13:14:48 +0000 (14:14 +0100)]
refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2 years agoMerge changes from topic "stm32mp1-trusted-boot" into integration
Manish Pandey [Mon, 14 Nov 2022 13:11:55 +0000 (14:11 +0100)]
Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
  docs(st): update documentation for TRUSTED_BOARD_BOOT
  fix(build): ensure that the correct rule is called for tools
  feat(stm32mp1): add the platform specific build for tools
  fix(stm32mp13-fdts): remove secure status
  feat(stm32mp1-fdts): add CoT and fuse references for authentication
  feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
  feat(stm32mp1): add the decryption support
  feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
  feat(stm32mp1): update ROM code API for header v2 management
  feat(stm32mp1): remove unused function from boot API
  refactor(stm32mp1): remove authentication using STM32 image mode
  fix(fconf): fix type error displaying disable_auth
  feat(tbbr): increase PK_DER_LEN size
  fix(auth): correct sign-compare warning
  feat(auth): allow to verify PublicKey with platform format PK
  feat(cert-create): update for ECDSA brainpoolP256r/t1 support
  feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
  feat(st-crypto): remove BL32 HASH driver usage
  feat(stm32mp1): add a stm32mp crypto library
  feat(st-crypto): add STM32 RNG driver
  feat(st-crypto): add AES decrypt/auth by SAES IP
  feat(st-crypto): add ECDSA signature check with PKA
  feat(st-crypto): update HASH for new hardware version used in STM32MP13

2 years agodocs(st): update documentation for TRUSTED_BOARD_BOOT
Lionel Debieve [Thu, 6 Oct 2022 07:00:14 +0000 (09:00 +0200)]
docs(st): update documentation for TRUSTED_BOARD_BOOT

Update the documentation to indicate commands needed for
TRUSTED_BOARD_BOOT management.

Change-Id: I7b8781eaa7f8b6b8d675a625c7ff2e1ee767222a
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofix(build): ensure that the correct rule is called for tools
Lionel Debieve [Mon, 14 Nov 2022 10:05:09 +0000 (11:05 +0100)]
fix(build): ensure that the correct rule is called for tools

In case of platform specific usage for both fiptool or certtool,
we need to ensure that the Makefile will use the correct rule
to generate the binary. Add the explicit call to the "all" rule.

Change-Id: I9724b63e01b3497daaedb9365c7d6a494aac9561
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofeat(stm32mp1): add the platform specific build for tools
Lionel Debieve [Thu, 6 Oct 2022 06:54:23 +0000 (08:54 +0200)]
feat(stm32mp1): add the platform specific build for tools

Add cert_create and fiptool specific files to add the platform
addons to the generic tools.

Change-Id: Ifa600241cdf32b495cc65edccddab47c3796b77d
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofix(stm32mp13-fdts): remove secure status
Lionel Debieve [Thu, 6 Oct 2022 06:52:30 +0000 (08:52 +0200)]
fix(stm32mp13-fdts): remove secure status

Remove the secure status for PKA and SAES entries.
The peripherals are used in BL2 at EL3, context will
remain secure only.

Change-Id: I79d95bc55a9afd27f295249936d7bc332c777f5e
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofeat(stm32mp1-fdts): add CoT and fuse references for authentication
Lionel Debieve [Thu, 6 Oct 2022 06:51:32 +0000 (08:51 +0200)]
feat(stm32mp1-fdts): add CoT and fuse references for authentication

Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing public root key reference for stm32mp15 and the
encryption key reference for stm32mp13.

Change-Id: I0ae2454979a3df6dd3e4361510317742e8fbc109
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofeat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
Lionel Debieve [Wed, 5 Oct 2022 14:52:09 +0000 (16:52 +0200)]
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip

Add a security check to enforce the usage of TRUSTED_BOARD_BOOT
on closed device. It will guarantee the secure bootchain.

Change-Id: Id6120d0e5041e8f2d3866e5710876ec96b6d0216
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofeat(stm32mp1): add the decryption support
Lionel Debieve [Wed, 5 Oct 2022 14:51:12 +0000 (16:51 +0200)]
feat(stm32mp1): add the decryption support

Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.

Limitation: STM32MP15 doesn't support the feature.

Change-Id: I96800bac7b22109f8471eb2953fc0dc269fc4fd1
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2 years agofeat(stm32mp1): add the TRUSTED_BOARD_BOOT support
Lionel Debieve [Wed, 5 Oct 2022 14:47:03 +0000 (16:47 +0200)]
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support

Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining the standard image ID in
order to decrease requested size in BL2 binary.
Authentication will use mbedTLS library for parsing certificate
configured with a platform configuration.

Change-Id: I9da66b915c5e9e9293fccfce92bef2434da1e430
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>