Marek Vasut [Sat, 25 Jun 2022 17:58:24 +0000 (19:58 +0200)]
board_init: Do not reserve MALLOC_F area on stack if non-zero MALLOC_F_ADDR
In case the MALLOC_F_ADDR is set to non-zero value, the early malloc area is
not going to be placed just below stack top, but elsewhere. Do not reserve
MALLOC_F bytes in this case, as that wastes stack space and may even cause
insufficient stack space in SPL.
This functionality is particularly useful on i.MX8M, where the insufficient
stack space can be triggered.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Tom Rini <trini@konsulko.com>
Pali Rohár [Thu, 23 Jun 2022 12:13:56 +0000 (14:13 +0200)]
serial: ns16550: Wait in debug_uart_init until tx buffer is empty
Commit b320cbd79bb3 ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.
But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.
Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).
Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl] Signed-off-by: Tom Rini <trini@konsulko.com>
led: pwm: Use NOP uclass driver for top-level node
The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit 920f001434b7
("led: gpio: Use NOP uclass driver for top-level node").
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Kory Maincent [Wed, 22 Jun 2022 09:11:45 +0000 (11:11 +0200)]
mtd: rawnand: Add support to dedicated function to set timings
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Rafał Miłecki [Thu, 16 Jun 2022 18:59:03 +0000 (20:59 +0200)]
fw_env: add fallback to Linux's NVMEM based access
A new DT binding for describing environment data block has been added in
Linux's commit 5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment
variables binding"). Once we get a proper Linux NVMEM driver it'll be
possible to use Linux's binary interface for user-space as documented
in the:
https://www.kernel.org/doc/html/latest/driver-api/nvmem.html
This commits makes fw_env fallback to looking for a compatible NVMEM
device in case config file isn't present. In a long term this may make
config files redundant and avoid code (info) duplication.
Pali Rohár [Tue, 31 May 2022 08:32:36 +0000 (10:32 +0200)]
distroboot: Fix ubifs
Fix multiple issues in ubifs distroboot code:
U-Boot supports attaching only one MTD device as UBI at the time. So
always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume
${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part'
command attach MTD device always as UBI device ubi0.
Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command.
Distroboot scripts require ${bootfstype} variable to be properly set and it
is already set for all other boot types.
Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI
device does not have partitions, but has volumes. Distroboot scripts
require something to be set in ${distro_bootpart} variable, so set it to
the UBI volume which is currently mounted by ubifs.
Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code
differs from the other partition code that it requires "ubi" prefix before
number.
Explicitly unmount ubifs volume after loading all data from it. This allows
to detach UBI device from MTD device.
Move definition of MTD device with UBI and UBI volume with ubifs filesystem
from global env variables ${bootubipart} and ${bootubivol} into the
distroboot "func" macro, defined in board include config files. UBIFS
distroboot macros then set ${bootubipart} and ${bootubivol} local variables
for compatibility with existing distroboot scripts.
This last change allows to define more UBIFS target devices and make it
clear what is boot MTD/UBI device.
All board include config files are adjusted to use this new scheme of
specifying boot MTD/UBI device.
Pali Rohár [Mon, 30 May 2022 09:09:11 +0000 (11:09 +0200)]
ubifs: Fix reference count leak in ubifsumount
Original ubifs code was designed that after ubifs_umount() call it is
required to also call ubi_close_volume() which closes underlying UBI
volume. But U-Boot ubifs modification have not implemented it properly
which caused that ubifsumount command contains resource leak. It can be
observed by calling simple sequence of commands:
=> ubi part mtd2
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway
ubi0: detaching mtd2
ubi0: mtd2 is detached
Fix this issue by calling ubi_close_volume() and mutex_unlock() in
directly in ubifs_umount() function before freeing U-Boot's global
ubifs_sb. And remove duplicate calls of these two functions in remaining
places. Note that when ubifs_umount() is not called then during error
handling is still needed to call ubi_close_volume() and mutex_unlock.
With this change ubifsumount command does not throw that error anymore:
=> ubi part rootfs
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0: detaching mtd2
ubi0: mtd2 is detached
Rogier Stam [Wed, 11 May 2022 21:20:28 +0000 (23:20 +0200)]
Add SCSI scan for ENV in EXT4 or FAT
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.
Tom Rini [Sat, 25 Jun 2022 23:29:46 +0000 (19:29 -0400)]
Convert CONFIG_SYS_BOOTM_LEN to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass
the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not
be available to host tools but we do know the size that we passed to
malloc().
Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:37 +0000 (11:02 -0400)]
Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
Tom Rini [Sat, 25 Jun 2022 15:02:33 +0000 (11:02 -0400)]
usb: Remove some unused CONFIG settings
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set
CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop
these from platforms that we can.
Tom Rini [Sat, 25 Jun 2022 15:02:32 +0000 (11:02 -0400)]
usb: ohci-hcd: Remove some unused legacy code
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Tom Rini [Sat, 25 Jun 2022 15:02:31 +0000 (11:02 -0400)]
Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Tom Rini [Sat, 11 Jun 2022 03:03:09 +0000 (23:03 -0400)]
spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <pali@kernel.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Bryan Brattlof [Tue, 21 Jun 2022 21:36:03 +0000 (16:36 -0500)]
soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Nishanth Menon [Fri, 17 Jun 2022 18:26:12 +0000 (13:26 -0500)]
board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:11 +0000 (13:26 -0500)]
board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:10 +0000 (13:26 -0500)]
board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:33 +0000 (17:45 +0300)]
board: ti: am62x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:32 +0000 (17:45 +0300)]
board: ti: am62x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:30 +0000 (17:45 +0300)]
arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.
Examples:
If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z
New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
board: ti: j721e: Return if there is an error while configuring SerDes
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.
Vaishnav Achath [Fri, 3 Jun 2022 06:02:16 +0000 (11:32 +0530)]
arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Vaishnav Achath [Fri, 3 Jun 2022 06:02:15 +0000 (11:32 +0530)]
common: spl: spl_spi: add support for dynamic override of sf bus
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Tom Rini [Mon, 20 Jun 2022 12:07:54 +0000 (08:07 -0400)]
socrates: Rework CONFIG_PCI_CLK_FREQ
The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.