Tom Rini [Tue, 26 Jul 2022 14:26:00 +0000 (10:26 -0400)]
Merge tag 'u-boot-imx-
20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20220726
-------------------
i.MX for 2022.10
- Added i.MX93 architecture
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
Tom Rini [Tue, 26 Jul 2022 12:32:37 +0000 (08:32 -0400)]
Merge tag 'xilinx-for-v2022.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.10-rc2
fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading
spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations
xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal
zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro
versal:
- Add xlnx-versal-resets.h header
mmc:
- zynq_sdhci: Fix macro for MMC HS
relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types
misc:
- Get rid of guard macros from ARM and RISC-V
lmb:
- Add support for disabling LMB
serial:
- zynq: Fix baudrate calculation
tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
Peng Fan [Tue, 26 Jul 2022 08:41:23 +0000 (16:41 +0800)]
imx: imx8mm-icore: migrate to use BINMAN
Use BINMAN instead of imx specific packing method.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:22 +0000 (16:41 +0800)]
arm: dts: imx8m: shrink ddr firmware size to actual file size
After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:21 +0000 (16:41 +0800)]
ddr: imx8m: helper: load ddr firmware according to binman symbols
By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
And that could save binary size for many KBs.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:20 +0000 (16:41 +0800)]
arm: dts: imx8m: update binman ddr firmware node name
We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.
Also add `type = "blob-ext";`, since the new names are not valid binman
types.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:19 +0000 (16:41 +0800)]
tools: image: support i.MX93
Support build i.MX93 container image with mkimage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:18 +0000 (16:41 +0800)]
board: freescale: imx93_evk: support ethernet
Add ethernet support
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:17 +0000 (16:41 +0800)]
net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr
i.MX has specific hook to get MAC address, so introduce a hook and move
i.MX code to its own driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:16 +0000 (16:41 +0800)]
net: eqos: add function to get phy node and address
Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:15 +0000 (16:41 +0800)]
net: dwc_eth_qos: move i.MX code out
Move i.MX code to a standalone file to make it easy for adding new
platform support
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:14 +0000 (16:41 +0800)]
net: dwc_eth_qos: public some functions
Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:13 +0000 (16:41 +0800)]
net: dwc_eth_qos: fix build break when CLK not enabled
When CONFIG_CLK is not enabled, there will be buil break:
"error: ‘eqos’ undeclared (first use in this function)"
Take eqos definition out the CONFIG_CLK ifdef.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:12 +0000 (16:41 +0800)]
net: fec_mxc: support i.MX93
Support i.MX93 in fec_mxc driver
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:11 +0000 (16:41 +0800)]
imx: imx93_evk: Set ARM clock to 1.7Ghz
Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:10 +0000 (16:41 +0800)]
imx: imx93_evk: Add basic board support
Add basic board codes and defconfig for i.MX93 11x11 EVK board.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:09 +0000 (16:41 +0800)]
arm: dts: Add i.MX93 SoC DTSi file
Add the DTSi file and DT header files for i.MX93 SoC
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:08 +0000 (16:41 +0800)]
ddr: imx9: enable Performance monitor counter
Add Kconfig for enabling reference events counter in DDRC performance
monitor by default
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:07 +0000 (16:41 +0800)]
ddr: imx: Add i.MX9 DDR controller driver
Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.
The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:06 +0000 (16:41 +0800)]
imx: imx9: clock: Add DDR clock support
Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:05 +0000 (16:41 +0800)]
imx: imx9: Support multiple env storages at runtime
Select env storages according to boot device at runtime
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:04 +0000 (16:41 +0800)]
imx: imx9: Support booting m33 from Acore
Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e0000 0"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:03 +0000 (16:41 +0800)]
imx: imx9: Add M33 release prepare function
To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.
The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:02 +0000 (16:41 +0800)]
imx: imx9: Add MIX power init
Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.
SPL should call the power init in its boot sequence before accessing
above three MIX and USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:01 +0000 (16:41 +0800)]
imx: imx9: Add gpio registers structure
Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:41:00 +0000 (16:41 +0800)]
misc: fuse: update the code for accessing fuse of i.MX93
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:40:59 +0000 (16:40 +0800)]
misc: fuse: support to access fuse on i.MX93
i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:40:58 +0000 (16:40 +0800)]
misc: imx8ulp: move fuse.c from imx8ulp to sentinel
The i.MX93 platform wants to reuse drivers/misc/imx8ulp/fuse.c. Moving
fuse.c from the folder imx8ulp to sentinel makes it can be used by other
platforms.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:57 +0000 (16:40 +0800)]
misc: S400_API: Rename imx8ulp_s400_msg to sentinel_msg
Use more generic name for S40x msg structure
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:56 +0000 (16:40 +0800)]
imx: imx9: Get the chip revision through S400 API
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:55 +0000 (16:40 +0800)]
imx: imx9: Add AHAB boot support
Add AHAB driver for iMX9 to do authentication by calling sentinel API
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:54 +0000 (16:40 +0800)]
imx: imx9: Add TRDC driver for TRDC init
Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
permission to the memory where SPL image runs. Sentinel will set
the memory to RX only after ROM authentication for the OEM
closed part.
2. Init phase will configure TRDC to allow non-secure master to
access DDR. So the peripherals can work in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:53 +0000 (16:40 +0800)]
misc: s400_api: introduce ahab_release_m33_trout
Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:52 +0000 (16:40 +0800)]
misc: S400_API: New API for FW status and chip info
Add new API to get sentinel FW status and SoC chip info
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:51 +0000 (16:40 +0800)]
misc: S400_API: Update release RDC API
To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:50 +0000 (16:40 +0800)]
misc: s4mu: Support iMX93 with Sentinel MU
Support iMX93 communicate with Sentinel
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:49 +0000 (16:40 +0800)]
misc: imx: S400_API: Move S400 MU and API to a common place
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:48 +0000 (16:40 +0800)]
imx: imx9: support romapi
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:47 +0000 (16:40 +0800)]
imx: imx9: disable watchdog
Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jian Li [Tue, 26 Jul 2022 08:40:46 +0000 (16:40 +0800)]
imx: imx9: Add function to initialize timer
Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:45 +0000 (16:40 +0800)]
spl: Use SPL_FIT_IMAGE_TINY for iMX9
Select SPL_FIT_IMAGE_TINY for i.MX9
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:44 +0000 (16:40 +0800)]
mmc: fsl_esdhc_imx: Support i.MX9
Support i.MX9 for fsl_esdhc_imx driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:43 +0000 (16:40 +0800)]
imx: imx9: Add CCM and clock API support
Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:42 +0000 (16:40 +0800)]
imx: pinctrl: add pinctrl and pinfunc file for i.MX93
Add the pinctrl driver and pinfunc header file to support iMX93
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:41 +0000 (16:40 +0800)]
gpio: pca953x: support pcal6524
Support pcal6524 IO expander driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:40 +0000 (16:40 +0800)]
fsl_lpuart: add i.MX9 support
i.MX9 shares same register layout as i.MX7ULP, so
add the i.MX9 define here.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:39 +0000 (16:40 +0800)]
imx: add basic i.MX9 support
Add i.MX9 Kconfig and basic files for the new SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:38 +0000 (16:40 +0800)]
imx: add USB2_BOOT type
Add USB2_BOOT type for i.MX8ULP and i.MX9
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:37 +0000 (16:40 +0800)]
imx: move get_boot_device to common file
i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.
Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:36 +0000 (16:40 +0800)]
imx: move get_boot_device to common header
Most i.MX implements get_boot_device, move it to common header to
simplify code
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:35 +0000 (16:40 +0800)]
imx: simplify dependency with SPL_BOOTROM_SUPPORT
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:34 +0000 (16:40 +0800)]
imx: spl: Allow iMX7/8/8M to overwrite spl_board_boot_device
Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:33 +0000 (16:40 +0800)]
imx: Change USB boot device type
The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:32 +0000 (16:40 +0800)]
arm: makefile: cleanup mach-imx usage
All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:31 +0000 (16:40 +0800)]
spl: imx8mm: enlarge SPL_MAX_SIZE
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.
The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Martyn Welch [Thu, 21 Jul 2022 13:47:56 +0000 (14:47 +0100)]
MAINTAINERS: Update file list for ARM Freescale IMX
The MAINTAINERS file currently lists files in
arch/arm/include/asm/arch-imx/ being part of the IMX maintainers
purview, however the arch/arm/include/asm/ directory also contains the
directories arch-imx8, arch-imx8m, arch-imx8ulp and arch-imxrt which
would also appear to be relevant to the team. Tweak the entry to cover
these directories so that tools like get_maintainers.pl will suggest
relevant maintainers when making changes just in these directories.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Jun Nie [Thu, 21 Jul 2022 10:30:05 +0000 (18:30 +0800)]
imx: syscounter: support timer_get_boot_us
With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Ashok Reddy Soma [Fri, 15 Jul 2022 14:01:19 +0000 (19:31 +0530)]
spi: zynq_qspi: Fix programming qspi speed
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 15 Jul 2022 14:01:18 +0000 (19:31 +0530)]
spi: zynq_qspi: Add support for zynq_qspi_mem_exec_op
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-4-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Fri, 15 Jul 2022 14:01:17 +0000 (19:31 +0530)]
spi: zynq_qspi: Use dummy buswidth in dummy byte calculation
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Siva Durga Prasad Paladugu [Fri, 15 Jul 2022 14:01:16 +0000 (19:31 +0530)]
spi: zynq_qspi: Add child pre probe function
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Sat, 16 Jul 2022 06:58:47 +0000 (12:28 +0530)]
spi: xilinx_spi: Add support ops to axi qspi driver
Add support_ops function to check controller supported operations by
spi-mem framework. Current default support ops function does not allow
dummy buswidth no more than 1, unless we are using buswidth is 4 for TX.
In order to support dummy buswidth > 1 by spi-nor framework we are adding
explicit support_ops to check controller supported operations.
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Sat, 16 Jul 2022 06:58:46 +0000 (12:28 +0530)]
spi: xilinx_spi: Add support for spi memory operations
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.
Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.
Simplified existing startup_block implementation.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Adrian Fiergolski [Fri, 22 Jul 2022 14:16:14 +0000 (17:16 +0300)]
fpga: zynqmp: support loading encrypted bitfiles
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.
This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
or eFUSEs, as a key source to the AES engine if the FSBL is not
encrypted. This prevents using the BBRAM or eFUSE as the key source
to the AES engine during run-time applications."
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:13 +0000 (17:16 +0300)]
fpga: zynqmp: support loading authenticated images
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).
Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:12 +0000 (17:16 +0300)]
fpga: zynqmp: add bitstream compatible checking
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-12-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:11 +0000 (17:16 +0300)]
fpga: zynqmp: reduce zynqmppl_load() code
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:10 +0000 (17:16 +0300)]
fpga: xilinx: pass compatible flags to load() callback
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:09 +0000 (17:16 +0300)]
spl: fit: pass real compatible flags to fpga_load()
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-9-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:08 +0000 (17:16 +0300)]
fpga: add fpga_compatible2flag
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-8-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:07 +0000 (17:16 +0300)]
fpga: pass compatible flags to fpga_load()
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-7-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:06 +0000 (17:16 +0300)]
fpga: xilinx: pass compatible flags to xilinx_load()
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:05 +0000 (17:16 +0300)]
fpga: zynqmp: add str2flags call
Add a call to convert FPGA "compatible" string to a binary flag.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:04 +0000 (17:16 +0300)]
fpga: xilinx: add bitstream flags to driver desc
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:03 +0000 (17:16 +0300)]
fpga: xilinx: add missed identifier names
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ying-Chun Liu (PaulLiu) [Wed, 25 May 2022 09:30:08 +0000 (17:30 +0800)]
configs: imx8mm-cl-iot-gate: enable extension command
For imx8mm-cl-iot-gate we can use extension command to scan
extension boards attached on the mainboard. We enable the
extension command by default for users to detect the extension
boards.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Tim Harvey [Fri, 20 May 2022 15:17:29 +0000 (08:17 -0700)]
configs: imx8mp_venice: remove unnecessary FEC_QUIRK_ENET_MAC
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:02 +0000 (17:16 +0300)]
fpga: add option for loading FPGA secure bitstreams
It allows using this feature without enabling the "fpga loads"
command.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Alexander Dahl [Thu, 21 Jul 2022 13:31:22 +0000 (15:31 +0200)]
fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig
This converts the following to Kconfig: SYS_FPGA_PROG_FEEDBACK
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-3-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Alexander Dahl [Thu, 21 Jul 2022 13:31:21 +0000 (15:31 +0200)]
fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
After commit
a7d36e38cf65 ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 22 Jul 2022 08:46:58 +0000 (02:46 -0600)]
arm64: versal: Enable power domain driver and its dependencies
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
This driver depends on mailbox and IPI driver, hence enable them as well.
Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for
Versal platforms.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com
Ashok Reddy Soma [Fri, 22 Jul 2022 08:46:57 +0000 (02:46 -0600)]
mailbox: zynqmp: Move struct zynqmp_ipi_msg from sys_proto.h
Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-5-ashok.reddy.soma@xilinx.com
Ashok Reddy Soma [Fri, 22 Jul 2022 08:46:56 +0000 (02:46 -0600)]
arm64: zynqmp: Enable power domain driver
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-4-ashok.reddy.soma@xilinx.com
Ashok Reddy Soma [Fri, 22 Jul 2022 08:46:55 +0000 (02:46 -0600)]
firmware: zynqmp: Load config overlay for core0 to pmufw
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-3-ashok.reddy.soma@xilinx.com
Ashok Reddy Soma [Fri, 22 Jul 2022 08:46:54 +0000 (02:46 -0600)]
firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
Ashok Reddy Soma [Wed, 20 Jul 2022 09:59:59 +0000 (03:59 -0600)]
arm64: zynqmp: Enable reset driver
Enable reset driver for ZynqMP platforms. This will enable us to reset
the IP's using generic reset_assert and reset_deassert calls.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Wed, 20 Jul 2022 09:59:58 +0000 (03:59 -0600)]
arm64: versal: Enable reset driver for versal
Add CONFIG_DM_RESET and CONFIG_RESET_ZYNQMP configs in versal default
configuration to enable support for reset driver for versal
platform.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-3-ashok.reddy.soma@xilinx.com
T Karthik Reddy [Wed, 20 Jul 2022 09:59:57 +0000 (03:59 -0600)]
reset: zynqmp: Add reset driver support for versal
Add support for versal platform by adding "xlnx,versal-reset"
compatible string in zynqmp-reset driver. Reset numbering schema
for versal is not same as zynqmp, so nr_reset and reset_id are
set to zero. In case of assert/dessert, required device reset id
is sent from respective driver through struct reset_ctl.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 21 Jul 2022 14:19:18 +0000 (16:19 +0200)]
xilinx: common: Use strlcpy instead of strncpy
It is recommendation done by checkpatch to all the time have \0 terminated
strings.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com
Michal Simek [Thu, 21 Jul 2022 14:19:17 +0000 (16:19 +0200)]
xilinx: Wire uuid reading from FRU
UUID is already recorded when FRU is parsed but it is not copied to local
structures and exported to variable that's why simply add it.
Data is saved in binary format but there must be conversion to string for
exporting it to variable and string should be in uuid format too.
One way how to use it directly is to setup pxeuuid based on it. For
example via preboot with "setenv pxeuuid ${board_uuid}"
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com
Kunihiko Hayashi [Wed, 13 Jul 2022 01:38:59 +0000 (10:38 +0900)]
serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider value
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Fri, 8 Jul 2022 06:15:06 +0000 (08:15 +0200)]
tools: relocate-rela: Define all macros for e_machine and reloc types
With some old toolchain not all values should be available that's why
better to define all of them to avoid compilation issues.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e2a66854c5506100eb82b5b33cec7f0b5fca1008.1657260903.git.michal.simek@amd.com
Michal Simek [Fri, 8 Jul 2022 06:15:05 +0000 (08:15 +0200)]
tools: relocate-rela: Remove guard around R_AARCH64_RELATIVE
In code you can find out this fragment:
19 #ifndef R_AARCH64_RELATIVE
20 #define R_AARCH64_RELATIVE 1027
21 #endif
which means that R_AARCH64_RELATIVE is defined all the time that's why
ifdef is not needed.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0d40a09ab6edcd88ba3059f7a0b63a819b71256a.1657260903.git.michal.simek@amd.com
Michal Simek [Thu, 7 Jul 2022 11:10:53 +0000 (13:10 +0200)]
dt-bindings: versal: Add versal reset IDs
The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
Michal Simek [Thu, 7 Jul 2022 11:06:16 +0000 (13:06 +0200)]
xilinx: Remove duplicate PMIO_NODE_ID_BASE macro
PMIO_NODE_ID_BASE is defined twice that's why remove one instance.
Fixes: 1cc5e55c007c ("spi: cadence_qspi: Enable apb linear mode for apb read & write operations")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce9a601bb99418aa20272d046c74678829d942cc.1657191974.git.michal.simek@amd.com
Michal Simek [Thu, 7 Jul 2022 10:59:42 +0000 (12:59 +0200)]
test/py: Run simple dm commands without checking
Just to make sure that dm commands can operate.
This was the problem on Microblaze in past without fixing manual
relocation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/e6c4b8b44445c16cee84436627642ccc9886f507.1657191580.git.michal.simek@amd.com
Michal Simek [Thu, 7 Jul 2022 10:52:26 +0000 (12:52 +0200)]
py: tests: Bind should run only on sandbox
Disable test to run on any other platform than sandbox.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/786bfdfda7dee4494e39c3fff699970ecd623116.1657191142.git.michal.simek@amd.com
Michal Simek [Thu, 7 Jul 2022 08:45:38 +0000 (10:45 +0200)]
arm64: zynqmp: Disable LMB for mini configurations
There is no need to have LMB enabled that's why save some space by
disabling it.
aarch64: (for 8/8 boards) all -1168.5 rodata -105.5 text -1063.0
xilinx_zynqmp_mini: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_qspi: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_emmc0: all -2661 rodata -237 text -2424
xilinx_zynqmp_mini_emmc1: all -2661 rodata -237 text -2424
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f735d7691f4e7a7958d985b22c40aeb26e37a404.1657183534.git.michal.simek@amd.com
Ashok Reddy Soma [Thu, 7 Jul 2022 08:45:37 +0000 (10:45 +0200)]
zynqmp: Run board_get_usable_ram_top() only on main U-Boot
With commit
043ef21b4b64 ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.
Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
Ashok Reddy Soma [Thu, 7 Jul 2022 08:45:36 +0000 (10:45 +0200)]
lmb: Fix lmb property's defination under struct lmb
Under struct lmb {} the lmb property's should be defined only if
CONFIG_LMB_MEMORY_REGIONS is defined.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c24a2b1d6f5db4eb65393f6a77fae129b30b6233.1657183534.git.michal.simek@amd.com