Amit Nagal [Thu, 23 Feb 2023 16:07:23 +0000 (21:37 +0530)]
feat(zynqmp): add hooks for mmap and early setup
Add early setup hooks (via custom_early_setup()) and provide a way
to cover custom memory mapping which includes extending memory map
via custom_mmap_add().
This likely also require to align MAX_XLAT_TABLE, MAX_XLAT_TABLES
macros. It can be done for example by defining these macros in
custom_pkg.mk
MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))
custom_early_setup() can be used for early low level operations
related to setting up the system to correct state.
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Change-Id: I61df6f9ba5af0bc97c430974fb10a2edde44f23d
Govindraj Raja [Tue, 21 Feb 2023 17:43:55 +0000 (17:43 +0000)]
refactor(bl31): use elx_panic for sysreg_handler64
When we reach sysreg_handler64 from any trap handling we are entering
this path from lower EL and thus we should be calling lower_el_panic
reporting mechanism to print panic report.
Make report_elx_panic available through assembly func elx_panic which
could be used for reporting any lower_el_panic.
Change-Id: Ieb260cf20ea327a59db84198b2c6a6bfc9ca9537 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Ronak Jain [Wed, 22 Feb 2023 12:28:02 +0000 (04:28 -0800)]
fix(zynqmp): add bitmask for get_op_char API
As per the current functionality, there are a couple of types like
PM_OPCHAR_TYPE_TEMP, PM_OPCHAR_TYPE_POWER and PM_OPCHAR_TYPE_LATENCY
for the PM_GET_OP_CHARACTERISTIC EEMI API which is mismatched across
the Versal and ZynqMP platforms.
So added the bitmask functionality for PM_GET_OP_CHARACTERISTIC API
in feature check in the firmware and as part of that the firmware fill
up payload[1] with the bitmask value of supported types of the
PM_GET_OP_CHARACTERISTIC EEMI API but from TF-A based on the current
codebase it is just returning the version. So filling up the bitmask
buffer which is received from the firmware and returned the same to
the user.
Govindraj Raja [Mon, 16 Jan 2023 17:35:07 +0000 (17:35 +0000)]
refactor(aarch64): rename do_panic and el3_panic
Current panic call invokes do_panic which calls el3_panic, but now panic
handles only panic from EL3 anid clear separation to use lower_el_panic()
which handles panic from lower ELs.
So now we can remove do_panic and just call el3_panic for all panics.
Change-Id: I739c69271b9fb15c1176050877a9b0c0394dc739 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Govindraj Raja [Mon, 16 Jan 2023 16:44:45 +0000 (16:44 +0000)]
refactor(aarch64): remove weak links to el3_panic
Cleanup weak links to el3_panic and restrict crash_reporting usage
to bl31.
Crash reporting is not used with bl1, bl2 and weak linkage to el3_panic
is used, this can cause ambiguity in understanding the code so remove
this weak linkage and introduce funcs that should be used when we have
crash reporting for el3 panics.
Change-Id: Ic5c711143ba36898ef9574a078b8fa02effceb12 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Govindraj Raja [Mon, 16 Jan 2023 15:11:47 +0000 (15:11 +0000)]
refactor(aarch64): refactor usage of elx_panic
Currently we call el3_panic for panics from EL3 and elx_panic for
panics from lower ELs.
When we boot into a rich OS environment and interact with BL31 using
SMC/ABI calls and we can also decide to handle any lower EL panics in
EL3. Panic can occur in lower EL from rich OS or during SMC/ABI calls
after context switch to EL3.
But after booting into any rich OS we may land in panic either from
rich OS or while servicing any SMC call, here the logic to use
el3_panic or elx_panic is flawed as spsr_el3[3:0] is always EL3h
and end up in elx_panic even if panic occurred from EL3 during
SMC handling.
We try to decouple the elx_panic usage for its intended purpose,
introduce lower_el_panic which would call elx_panic, currently
lower_el_panic is called from default platform_ea_handle which
would be called due to panic from any of the lower ELs.
Also remove the weak linkage for elx_panic and rename it to
report_elx_panic which could be used with lower_el_panic.
Change-Id: I268bca89c01c60520d127ef6c7ba851460edc747 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Govindraj Raja [Fri, 27 Jan 2023 10:08:54 +0000 (10:08 +0000)]
feat(build): allow additional CFLAGS for library build
Current CFLAGS if set for library builds could impact entire build, so
allow to pass additional CFLAGs for library builds based on format
<LIBNAME>_CFLAGS.
This support is currently needed to avoid 'redundant declaration'
error from latest mbedtls-3.3, the issue is reported to mbedtls[1]
and is under consideration to remove any redundant declarations.
But till then we have to disable that compiler option while building
for mbedtls-3.3
Michal Simek [Mon, 20 Feb 2023 12:01:27 +0000 (13:01 +0100)]
fix(zynqmp): panic w/o handoff structure in !JTAG
In case that FSBL (or SPL) doesn't provide valid handoff structure don't
fallback to default image location. In non JTAG boot mode all the time
structure should be passed. If it is not it can be opportunity to inject
any code to default locations and start it. That's why panic in all
these cases.
Change-Id: Ib3e11e2ae9ffec7406002cce4997b12b97bdc396 Signed-off-by: Michal Simek <michal.simek@amd.com>
Jorge Troncoso [Tue, 21 Feb 2023 02:35:24 +0000 (18:35 -0800)]
fix(ufs): device present (DP) field is set to '1'
The Device Present (DP) field is set to '1' after host controller
receive 'SUCCESS' return code on the response of the DME_LINKSTARTUP UIC
CMD during host controller initialization.
Chris Kay [Tue, 14 Feb 2023 11:30:04 +0000 (11:30 +0000)]
build: always prefix section names with `.`
Some of our specialized sections are not prefixed with the conventional
period. The compiler uses input section names to derive certain other
section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be
difficult to select in linker scripts when there is a lack of a
delimiter.
This change introduces the period prefix to all specialized section
names.
BREAKING-CHANGE: All input and output linker section names have been
prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.
Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c Signed-off-by: Chris Kay <chris.kay@arm.com>
Michal Simek [Mon, 20 Feb 2023 11:53:31 +0000 (12:53 +0100)]
fix(zynqmp): move EM SMC range to SIP range
EM SMC where out of SIP range which is 15:0 bits only. EM was used 19:17
bits which is wrong but no code was checking it. That's why vove EM SMC
to SIP range.
Change-Id: I83f998a17a8b82b2c25ea8c9b247e42642c82178 Signed-off-by: Michal Simek <michal.simek@amd.com>
Amit Nagal [Wed, 15 Feb 2023 13:13:55 +0000 (18:43 +0530)]
feat(zynqmp): add support for custom sip service
Add support for custom sip service.
Bare minimum implementation for custom_smc_handler is provided
by platform. Actual definition for custom_smc_handler will be provided
by custom pkg.
This feature is going to be used by external libraries. For example
for checking it's status.
The similar approach is also used by qti/{sc7180,sc7280} platforms
by providing a way to select QTISECLIB_PATH.
This code is providing a generic way how to wire any code
via custom $(CUSTOM_PKG_PATH)/custom_pkg.mk makefile with also an
option to wire custom SMC. SMC functionality depends on "package".
Change-Id: Icedffd582f76f89fc399b0bb2e05cdaee9b743a0 Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Michal Simek [Wed, 15 Feb 2023 11:39:22 +0000 (12:39 +0100)]
fix(versal): check smc_fid 23:16 bits
23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc200ffff. That's why make sure that code won't handle
any SMCs in SIP range out of predefined range.
Also fix MASK values to check the same range for PM/IPI calls to make
sure that masking covers all required bits including 23:16. Bits 15:12
are used for different class of requests.
Change-Id: I9d3e91aa521d6bb90f6b15b71ff1e89fa77ee379 Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Tue, 14 Feb 2023 12:10:29 +0000 (13:10 +0100)]
fix(zynqmp): check smc_fid 23:16 bits
23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc200ffff. That's why make sure that code won't handle
any SMCs in SIP range out of predefined range. Because EM SMC is out of
this range already on this SOC check it after it (EMC SMC will be
handled separately).
Also fix MASK values to check the same range for PM/IPI/EM calls to make
sure that masking covers all required bits including 23:16. Bits 15:12
are used for different class of requests.
Change-Id: If23ac769c91d206e47758aeaa1f14e8b9c3dc7bb Signed-off-by: Michal Simek <michal.simek@amd.com>
In the ZynqMP, 0x36 EEMI API ID is used for PM_FPGA_GET_VERSION and 0x37
is used for PM_FPGA_GET_FEATURE_LIST. The same ID numbers in the Versal
are used for PM_ADD_SUBSYSTEM and PM_DESTROY_SUBSYSTEM and it leads to
the EEMI API ID conflict between the platforms. To fix this issue this
patch updates the PM_FPGA_GET_VERSION and PM_FPGA_GET_FEATURE_LIST EEMI
API ID's to 0x48 and 0x49.
In linux zynqmp_pm_fpga_get_version() and
zynqmp_pm_fpga_get_feature_list() API's are uses PM_FPGA_GET_VERSION
and PM_FPGA_GET_FEATURE_LIST to get the xilfpga version and
xilfpga-supported feature list info. These API's are called only in
zynqmp-fpga.c as part of the probe. In case of this caller API's are
failed it will fall to the default feature list and this default
feature list is same as latest xilfpga-supported feature list (No new
feature was added in the xilfpga after adding these APIs). So, these
updated IDs will not cause any functional issues between Linux, TF-A,
and firmware components.
Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Change-Id: I14d974dd44651681ecbf726ad8b6940e1850cbec
Michal Simek [Wed, 8 Feb 2023 12:34:47 +0000 (13:34 +0100)]
fix(versal): sync location based on IPI_ID macros
IPI_ID_* macros available at include/plat_ipi.h are using PMC/APU/RPU0..
order which is not how versal_ipi_table array is composed. That's why
swap APU and PMC to follow the same order as is described by macros.
Change-Id: Ieaa3a967650e298e7cff45fafde0df96294c09fe Signed-off-by: Michal Simek <michal.simek@amd.com>
Akshay Belsare [Wed, 15 Feb 2023 05:19:52 +0000 (10:49 +0530)]
fix(zynqmp): with DEBUG=1 move bl31 to DDR range
Due to size constraints in OCM memory range keeping the bl31 with
DEBUG=1 overlaps with the memory range from other Firmware thus
affecting the bootflow on target.
bl31 binary can not be placed in OCM memory range when built with
DEBUG=1.
With DEBUG=1, by default bl31 is moved to DDR memory range
0x1000-0x7FFFF.
The user can provide a custom DDR memory range during build time using
the build parameters ZYNQMP_ATF_MEM_BASE and ZYNQMP_ATF_MEM_SIZE.
Akshay Belsare [Wed, 15 Feb 2023 11:59:42 +0000 (17:29 +0530)]
fix(zynqmp): update MAX_XLAT_TABLES for DDR memory range
An assert is observed when the bl31 is placed in DDR memory range and
DEBUG is also enabled. To resolve this, increase the size of
MAX_XLAT_TABLES to 8 when bl31 is placed in DDR memory range.
Ronak Jain [Mon, 13 Feb 2023 12:48:06 +0000 (04:48 -0800)]
feat(zynqmp): bump up version of query_data API
As per the current code base, the version of the PM_QUERY_DATA EEMI
API is 2 in the Versal but in ZynqMP it returns the base version.
Since this EEMI API ID support similar functionality for Versal and
ZynqMP, hence there should not be any difference in the versioning
as well.
In version 2, the feature check API supports the bitmask functionality
of the QUERY_DATA API, so the user can query the supported QUERY_DATA
ID first and if the ID is supported then the user can perform the
actual functionality of the same.
Hence, bump up the version of PM_QUERY_DATA API Id to 2.
Chris Kay [Thu, 22 Dec 2022 13:26:37 +0000 (13:26 +0000)]
build: communicate correct page size to linker
This change communicates the common and maximum page sizes to the
linker, which allows us to use the built-in constants that it provides
to deal with page alignments.
We only support 4K pages today so the fact these are fixed is not too
much of an issue, but we will need to revisit this if we ever support
other page sizes.
Change-Id: I3358c51e70df794025ddf25209ae0e2a96550b0e Signed-off-by: Chris Kay <chris.kay@arm.com>
Harrison Mutai [Mon, 13 Feb 2023 18:30:04 +0000 (18:30 +0000)]
docs: fix broken Juno links
Certain links to Juno documentation point to a location that were
removed at some point, or are unused. Fix links to point to the latest
available version on Arm's public documentation site, and remove those
that are no longer being used.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I59202767db8834e9c302b2826f3faee47d3a5edd
Add code in SPMD to forward calls to FFA_PARTITION_INFO_GET_REGS. This
is a new ABI that allows getting partition information without the need
for rx/tx buffer, that helps in situations where having an rx/tx buffer
mapped and available is difficult (ex. uefi runtime services).
Currently, the spmc at el3 does not support this new ABI.
The new ABI uses registers x8-x17 to return partition information so
changes are made to ensure those registers are passed through to the
SPMC and restored on the return path.
Boyan Karatotev [Mon, 9 Jan 2023 11:50:24 +0000 (11:50 +0000)]
build(docs): update Python dependencies
Update the python dependencies for building the project's Sphinx
documentation. Sphinx plugins are updated to the latest version, while
Sphinx itself is only updated to 5.3.0 (latest 5.x.x revision) due to
sphinx-rtd-theme not supporting any higher (both require incompatible
versions of docutils). Myst-parser is also updated to the latest version
to prevent a docutils clash as well.
The effect of this is to bump certifi to version 2022.12.7 and wheel to
0.38.4 as suggested by dependabot.
Boyan Karatotev [Thu, 9 Feb 2023 15:59:39 +0000 (15:59 +0000)]
fix(docs): make required compiler version == rather than >=
TF-A carries its own compiler-rt so higher versions of the compilers may
not necessarily work. Because TF-A is only tested on the specified
versions in the CI, any breakage remains unknown. Update the
prerequisites guide to make it more apparent that this is the case.
Boyan Karatotev [Thu, 9 Feb 2023 15:55:34 +0000 (15:55 +0000)]
fix(deps): add missing aeabi_memset.S
This file provides __aeabi_memclr8 builtin which the Ubuntu 22.04
version of clang 14 needs to compile. Add it to prevent this oddity from
failing the build.
Michal Simek [Mon, 13 Feb 2023 12:11:28 +0000 (13:11 +0100)]
fix(zynqmp): fix DT reserved allocated size
BL31_LIMIT is not size but reserved node reg property contains base
address and size that's why BL31_LIMIT - BL31_BASE + 1 is correct size
of reseved space for BL31.
Also update warning message to cover that it is for BL31.
Change-Id: I53f53d2170eb873f758f9ba250d54f57f0b562b4 Signed-off-by: Michal Simek <michal.simek@amd.com>
handle_lower_el_async_ea and enter_lower_el_async_ea are same except for
saving x30 register, with previous patch x30 is now freed before calling
these function we don't need both of them.
This patch also unifies the naming convention, now we have 3 handlers
- handle_lower_el_ea_esb
- handle_lower_el_sync_ea
- handle_lower_el_async_ea
Manish Pandey [Wed, 11 Jan 2023 21:41:07 +0000 (21:41 +0000)]
refactor(el3_runtime): introduce save_x30 macro
Most of the macros/routine in vector entry need a free scratch register.
Introduce a macro "save_x30" and call it right at the begining of vector
entries where x30 is used. It is more exlicit and less error prone
Chris Kay [Mon, 16 Jan 2023 18:57:26 +0000 (18:57 +0000)]
build: permit multiple linker scripts
This change allows platforms to provide more than one linker script to
any image utilizing the `MAKE_BL` build system macro.
This is already done by some MediaTek platforms via the
`EXTRA_LINKERFILE` build system variable, which has now been removed.
In its place, additional linker scripts may be added to the
`<IMAGE>_LINKER_SCRIPT_SOURCES` variable.
BREAKING-CHANGE: The `EXTRA_LINKERFILE` build system variable has been
replaced with the `<IMAGE>_LINKER_SCRIPT_SOURCES` variable. See the
commit message for more information.
Change-Id: I3f0b69200d6a4841fd158cd09344ce9e67047271 Signed-off-by: Chris Kay <chris.kay@arm.com>
These new names better reflect how each variable is used:
1. the default linker script is passed via `-dT` instead of `-T`
2. linker script source files are first preprocessed
Additionally, linker scripts are now placed in the build directory
relative to where they exist in the source directory. For example,
the `bl32/sp_min/sp_min.ld.S` would now preprocess to
`sp_min/sp_min.ld` instead of just `bl32.ld`
BREAKING-CHANGE: The `LINKERFILE`, `BL_LINKERFILE` and
`<IMAGE_LINKERFILE>` build system variables have been renamed. See the
commit message for more information.
Change-Id: If8cef65dcb8820e8993736702c8741e97a66e6cc Signed-off-by: Chris Kay <chris.kay@arm.com>
Chris Kay [Thu, 29 Sep 2022 13:36:53 +0000 (14:36 +0100)]
style: normalize linker script code style
There are a variety of code styles used by the various linker scripts
around the code-base. This change brings them in line with one another
and attempts to make the scripts more friendly for skim-readers.
Change-Id: Ibee2afad0d543129c9ba5a8a22e3ec17d77e36ea Signed-off-by: Chris Kay <chris.kay@arm.com>
Chris Kay [Thu, 2 Feb 2023 14:39:03 +0000 (14:39 +0000)]
fix(pie): pass `-fpie` to the preprocessor as well
When PIE is enabled, the `-fpie` flag is passed to the compiler but not
to the preprocessor. This change ensures that both tools are aware of
when the image is position-independent when preprocessing, which impacts
some pre-defined preprocessor definitions.
Change-Id: I5208a591d60ee01312f6bf3dd7343abe6535ee61 Signed-off-by: Chris Kay <chris.kay@arm.com>
Thomas Viehweger [Mon, 23 Jan 2023 10:26:37 +0000 (11:26 +0100)]
fix(tsp): loop / crash if mmap of region fails
In test_memory_send the variable i is of unsigned type, so
it is never negative. If i is 0, the result of i-- is 4294967295. Don't know what happens if trying to
access composite->address_range_array[4294967295].
Made i a signed integer.
Signed-off-by: Thomas Viehweger <Thomas.Viehweger@rohde-schwarz.com>
Change-Id: I8b4e532749b5e86e4b5acd238e72c3f88e309ff2
Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes:
feat(spmd): map SPMC manifest region as EL3_PAS
feat(fvp): update device tree with load addresses of TOS_FW config
refactor(fvp): rename the DTB info structure member
feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
There were some late comments to the prior change (18635) which are
address in this commit. There was also an invalid return value check
which was changed and the wrong result was being returned via the SMC
call for loading OP-TEE which is now fixed.
laurenw-arm [Wed, 8 Feb 2023 19:14:54 +0000 (13:14 -0600)]
fix(cert-create): change WARN to VERBOSE
SAVE_KEYS is set to '0' by default, causing cert_create to
show the 'Key filename not specified' message on each run
even though this is perfectly normal. Show the message only
in the VERBOSE log level.
Maksims Svecovs [Thu, 9 Feb 2023 16:48:34 +0000 (16:48 +0000)]
feat(git-hooks): add pre-commit hook
Adds a pre-commit git hook to keep track of copyright year.
Checks staged files for Arm copyright header and suggests a change if
the year is outdated. Works with both single-year format and
from_year-to_year format.
The tos_fw_config is currently loaded into memory by BL2 and
consumed by SPMD (part of BL31) and BL32 firmwares. This does
not work in RME-enabled systems as BL31 uses the root PAS memory
and does not trust secure PAS memory.
A first attempt was made to map the TOS_FW_CONFIG region as root PAS,
and then to remap to secure PAS after SPMD consumption, but this was
not suitable for RME systems where memory encryption is enabled.
This can be solved by copying the TOS FW config (SPMC manifest) from
the Root PAS region to the Secure PAS region so that BL32 can consume
it.
Change-Id: I8eef8345366199cb0e367db883c34a5b5136465d Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
BL31 already reports that there is missing CPU workaround for this
erratum as
"WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!"
That's why enable it by default as was done by other platforms for
example by commit 74665119f04d ("allwinner: Enable workaround for
Cortex-A53 erratum 1530924").
Change-Id: I251ffe3c307781b07477afb64f4e7af5dd9af9fe Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 9 Feb 2023 09:28:58 +0000 (10:28 +0100)]
feat(zynqmp): add SMCCC_ARCH_SOC_ID support
Add support for calling SMCCC_ARCH_SOC_ID which is used by Linux soc_id
driver for printing information about manufacturer and also chip version
and silicon ID code. SOC revision is directly mapped to chip ID code.
And SOC version is composed from manufacturer ID based on JEP-106 with
chip_id which contains bits mapped to CPU register 0xffca0044 platform
bits which differentiate between silicon, qemu and other emulated
platforms.
Function description is available at
docs/getting_started/porting-guide.rst.
Change-Id: I1f19e1973593897e71b39244dbdbceb6bd0e8a07 Signed-off-by: Michal Simek <michal.simek@amd.com>
Maksims Svecovs [Thu, 2 Feb 2023 16:10:22 +0000 (16:10 +0000)]
fix(context-mgmt): enable SCXTNUM access
Enable SCXTNUM_ELx access for lower ELs in non-secure state.
Make realm context setup take this build flag into account but enable it
by default when RME is used.
projects / arm-tf.git / log