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7 years agodrm/amd/display: dal 3.1.13
Tony Cheng [Tue, 31 Oct 2017 21:55:20 +0000 (17:55 -0400)]
drm/amd/display: dal 3.1.13

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: call set csc_default if enable adjustment is false
Yue Hin Lau [Fri, 27 Oct 2017 19:28:38 +0000 (15:28 -0400)]
drm/amd/display: call set csc_default if enable adjustment is false

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Add OPP DPG blank function
Eric Bernstein [Tue, 31 Oct 2017 15:52:25 +0000 (11:52 -0400)]
drm/amd/display: Add OPP DPG blank function

Added a function to blank data using OPP DPG.
Clean up code to prepare for pseudocode review with HW.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: dal 3.1.12
Tony Cheng [Tue, 31 Oct 2017 17:51:40 +0000 (13:51 -0400)]
drm/amd/display: dal 3.1.12

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: cache pwl params and scl_data to avoid extra programming
Dmytro Laktyushkin [Fri, 27 Oct 2017 21:55:03 +0000 (17:55 -0400)]
drm/amd/display: cache pwl params and scl_data to avoid extra programming

This saves us about 5000 reg writes per full update. This translates to about
40000 writes over the course of single eDP bootup.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Don't use dc_link in link_encoder
Andrew Jiang [Tue, 26 Sep 2017 23:45:43 +0000 (19:45 -0400)]
drm/amd/display: Don't use dc_link in link_encoder

dc_link is at a higher level than link_encoder, and we only want
higher-level components to be able to access lower-level ones,
not the other way around.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Both timing_sync and multisync need stream_count > 1
Harry Wentland [Mon, 30 Oct 2017 19:53:40 +0000 (15:53 -0400)]
drm/amd/display: Both timing_sync and multisync need stream_count > 1

Previous code threw a warning about misleading indentation

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Add tg_init interface.
Yongqiang Sun [Mon, 30 Oct 2017 17:35:04 +0000 (13:35 -0400)]
drm/amd/display: Add tg_init interface.

Clear OPTC underflow status when init_hw.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Enalbe blank data double buffer after mpc disconnected.
Yongqiang Sun [Mon, 23 Oct 2017 19:57:52 +0000 (15:57 -0400)]
drm/amd/display: Enalbe blank data double buffer after mpc disconnected.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: get remote dpcd caps for timing validation
Eric Yang [Mon, 23 Oct 2017 16:06:54 +0000 (12:06 -0400)]
drm/amd/display: get remote dpcd caps for timing validation

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Only update dchub if hubbub is available
Yue Hin Lau [Thu, 26 Oct 2017 20:30:44 +0000 (16:30 -0400)]
drm/amd/display: Only update dchub if hubbub is available

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Call ipp_program_bias_and_scale only if available
Eric Bernstein [Thu, 26 Oct 2017 22:13:36 +0000 (18:13 -0400)]
drm/amd/display: Call ipp_program_bias_and_scale only if available

Also move some register definitions to common DCN regs.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: dal 3.1.11
Tony Cheng [Thu, 26 Oct 2017 03:28:38 +0000 (23:28 -0400)]
drm/amd/display: dal 3.1.11

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: hubbub function flipping true and false
Yue Hin Lau [Thu, 26 Oct 2017 15:29:54 +0000 (11:29 -0400)]
drm/amd/display: hubbub function flipping true and false

no logic change

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Do post_update_surfaces on new state
Charlene Liu [Thu, 26 Oct 2017 00:30:46 +0000 (20:30 -0400)]
drm/amd/display: Do post_update_surfaces on new state

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: function renaming for hubbub
Yue Hin Lau [Tue, 24 Oct 2017 19:16:38 +0000 (15:16 -0400)]
drm/amd/display: function renaming for hubbub

following the naming convention with correct prefix

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: create new function prototype update_dchub for dcn
Yue Hin Lau [Tue, 24 Oct 2017 18:13:16 +0000 (14:13 -0400)]
drm/amd/display: create new function prototype update_dchub for dcn

dcn version of update_dchub now uses hubbub instead of hwseq

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: remove redundant variable pf2vf_ver
Colin Ian King [Sat, 11 Nov 2017 11:51:10 +0000 (11:51 +0000)]
drm/amdgpu/virt: remove redundant variable pf2vf_ver

Variable pf2vf_ver is assigned but never read, it is redundant and
hence can be removed.

Cleans up clang warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:310:3: warning: Value stored
to 'pf2vf_ver' is never read

Reivewed-by: Horace Chen <horace.chen@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: fix UVD mc offsets
Piotr Redlewski [Fri, 10 Nov 2017 18:28:01 +0000 (19:28 +0100)]
drm/amd/amdgpu: fix UVD mc offsets

When UVD bo is created, its size is based on the information from firmware
header (ucode_size_bytes). The same value should be be used when programming
UVD mc controller offsets, otherwise it can happen that
(mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will point
AMDGPU_GPU_PAGE_SIZE bytes after the UVD bo end.

Second issue is that when programming the mmUVD_VCPU_CACHE_SIZE0 register,
AMDGPU_UVD_FIRMWARE_OFFSET should be taken into account. If it isn't,
(mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will always point
AMDGPU_UVD_FIRMWARE_OFFSET bytes after the UVD bo end.

v2: move firmware size calculation into macro definition
v3: align firmware size to the gpu page size

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Piotr Redlewski <predlewski@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Multi display synchronization logic
Mikita Lipski [Tue, 17 Oct 2017 19:29:22 +0000 (15:29 -0400)]
drm/amd/display: Multi display synchronization logic

This feature synchronizes multiple displays with various timings
to a display with the highest refresh rate
it is enabled if edid caps flag multi_display_sync is set to one

There are limitations on refresh rates allowed
that can be synchronized. That would
prevent from underflow and other potential
corruptions.

Multi display synchronization is using the
same functions as timing_sync in order to minimize
redunduncy and decision to disable synchronization is
based on trigger parametre set in DM

Feature is developed for DCN1 and DCE11

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Implement BO size validation V2
Andrey Grodzovsky [Fri, 10 Nov 2017 23:35:56 +0000 (18:35 -0500)]
drm/amdgpu: Implement BO size validation V2

Validates BO size against each requested domain's total memory.

v2:
Make GTT size check a MUST to allow fall back to GTT.
Rmove redundant NULL check.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup vm_size handling
Christian König [Sat, 4 Nov 2017 15:51:44 +0000 (16:51 +0100)]
drm/amdgpu: cleanup vm_size handling

It's pointless to have the same value twice, just always use max_pfn.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
Christian König [Fri, 3 Nov 2017 14:59:25 +0000 (15:59 +0100)]
drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result

Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use dep_sync for CS dependency/syncobj
Chunming Zhou [Mon, 13 Nov 2017 02:51:57 +0000 (10:51 +0800)]
drm/amdgpu: use dep_sync for CS dependency/syncobj

Otherwise, they could be optimized by scheduled fence.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: Fix compute ring failure after resetting
Xiangliang.Yu [Fri, 10 Nov 2017 06:23:38 +0000 (14:23 +0800)]
drm/amdgpu/gfx8: Fix compute ring failure after resetting

Do ring clear before ring test, otherwise compute ring test will
fail after gpu resetting. Still can't find the root cause, just
workaround it.

Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Acked-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: remove ttm_bo_unreserve_ticket
Christian König [Wed, 8 Nov 2017 20:06:03 +0000 (21:06 +0100)]
drm/ttm: remove ttm_bo_unreserve_ticket

Just another alias for ttm_bo_unreserve.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: user reservation object wrappers v2
Christian König [Wed, 8 Nov 2017 20:02:31 +0000 (21:02 +0100)]
drm/ttm: user reservation object wrappers v2

Consistently use the reservation object wrappers instead of accessing
the ww_mutex directly.

Additional to that use the reservation object wrappers directly instead of
calling __ttm_bo_reserve with fixed parameters.

v2: fix typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: consistently use reservation_object_unlock
Christian König [Wed, 8 Nov 2017 13:38:34 +0000 (14:38 +0100)]
drm/ttm: consistently use reservation_object_unlock

Instead of having a confusing wrapper or call the underlying ww_mutex
function directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: move unlocking out of ttm_bo_cleanup_memtype_use
Christian König [Wed, 8 Nov 2017 11:37:35 +0000 (12:37 +0100)]
drm/ttm: move unlocking out of ttm_bo_cleanup_memtype_use

Needed for the next patch and makes the code quite a bit easier to
understand.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/scheduler: add WARN_ON for s_fence->parent
Chunming Zhou [Tue, 7 Nov 2017 02:27:43 +0000 (10:27 +0800)]
drm/amd/scheduler: add WARN_ON for s_fence->parent

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/scheduler: fix page protection of cb
Chunming Zhou [Tue, 7 Nov 2017 02:40:00 +0000 (10:40 +0800)]
drm/amd/scheduler: fix page protection of cb

We must remove the fence callback.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: revise retry init to fully cleanup driver
Pixel Ding [Wed, 8 Nov 2017 03:03:14 +0000 (11:03 +0800)]
drm/amdgpu: revise retry init to fully cleanup driver

Retry at drm_dev_register instead of amdgpu_device_init.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoamdgpu/dm: Remove fb_location form fill_plane_attributes
Harry Wentland [Wed, 8 Nov 2017 14:58:59 +0000 (09:58 -0500)]
amdgpu/dm: Remove fb_location form fill_plane_attributes

We no longer set the framebuffer address here so this is now
dead code.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:fix gpu recover missing skipping(v2)
Monk Liu [Wed, 8 Nov 2017 06:35:04 +0000 (14:35 +0800)]
drm/amdgpu:fix gpu recover missing skipping(v2)

if app close CTX right after IB submit, gpu recover
will fail to find out the entity behind this guilty
job thus lead to no job skipping for this guilty job.

to fix this corner case just move the increasement of
job->karma out of the entity iteration.

v2:
only do karma increasment if bad->s_priority != KERNEL
because we always consider KERNEL job be correct and always
want to recover an unfinished kernel job (sometimes kernel
job is interrupted by VF FLR or other GPU hang event)

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-By: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:read VRAMLOST from gim
Monk Liu [Mon, 30 Oct 2017 12:11:54 +0000 (20:11 +0800)]
drm/amdgpu:read VRAMLOST from gim

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: bypass FB resizing for SRIOV VF
pding [Tue, 7 Nov 2017 03:02:00 +0000 (11:02 +0800)]
drm/amdgpu: bypass FB resizing for SRIOV VF

It introduces 900ms latency in exclusive mode which causes failure
of driver loading. Host can resize the BAR before guest staring,
so the resizing is not necessary here.

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: release exclusive mode after hw_init
pding [Mon, 6 Nov 2017 03:21:55 +0000 (11:21 +0800)]
drm/amdgpu: release exclusive mode after hw_init

Signed-off-by: pding <Pixel.Ding@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdkfd: initialise kfd inside amdgpu_device_init
pding [Mon, 6 Nov 2017 02:21:26 +0000 (10:21 +0800)]
drm/amdkfd: initialise kfd inside amdgpu_device_init

Also finalize kfd inside amdgpu_device_fini. kfd device_init needs
SRIOV exclusive accessing. Try to gather exclusive accessing to
reduce time consuming.

Signed-off-by: pding <Pixel.Ding@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind v2
Christian König [Thu, 26 Oct 2017 15:54:12 +0000 (17:54 +0200)]
drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind v2

Just allocate the GART space and fill it.

This prevents forcing the BO to be idle.

v2: don't unbind/bind at all, just fill the allocated GART space

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: rename amdgpu_ttm_bind to amdgpu_ttm_alloc_gart
Christian König [Fri, 27 Oct 2017 13:43:14 +0000 (15:43 +0200)]
drm/amdgpu: rename amdgpu_ttm_bind to amdgpu_ttm_alloc_gart

We actually don't bind here, but rather allocate GART space if necessary.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: switch to use new SOC15 reg read/write macros for soc15 ih
Hawking Zhang [Thu, 2 Nov 2017 09:53:37 +0000 (17:53 +0800)]
drm/amdgpu: switch to use new SOC15 reg read/write macros for soc15 ih

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: resize VRAM BAR for CPU access v6
Christian König [Tue, 28 Feb 2017 09:36:43 +0000 (10:36 +0100)]
drm/amdgpu: resize VRAM BAR for CPU access v6

Try to resize BAR0 to let CPU access all of VRAM.

v2: rebased, style cleanups, disable mem decode before resize,
    handle gmc_v9 as well, round size up to power of two.
v3: handle gmc_v6 as well, release and reassign all BARs in the driver.
v4: rename new function to amdgpu_device_resize_fb_bar,
    reenable mem decoding only if all resources are assigned.
v5: reorder resource release, return -ENODEV instead of BUG_ON().
v6: squash in rebase fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine SR-IOV firmware VRAM reservation to protect data
Horace Chen [Wed, 1 Nov 2017 11:32:11 +0000 (19:32 +0800)]
drm/amdgpu: refine SR-IOV firmware VRAM reservation to protect data

The previous solution will create a zero buffer on the system
domain and then move the zeroes to the VRAM. This will break the
original data on the VRAM.

Refine the code to create bo on VRAM domain directly and then remove
and re-create mem node to the exact position before bo_pin. This can
avoid breaking the data and will not cause eviction.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: retry init if exclusive mode request is failed
pding [Mon, 30 Oct 2017 06:07:24 +0000 (14:07 +0800)]
drm/amdgpu: retry init if exclusive mode request is failed

This is caused of that hypervisor fails to handle request, one known
issue is MMIO unblocking timeout. In theory we can retry init here.

Signed-off-by: pding <Pixel.Ding@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: return error when sriov access requests get timeout
pding [Mon, 30 Oct 2017 05:51:54 +0000 (13:51 +0800)]
drm/amdgpu: return error when sriov access requests get timeout

Reported-by: Sun Gary <Gary.Sun@amd.com>
Signed-off-by: pding <Pixel.Ding@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Remove fb_location parameter from get_fb_info
Michel Dänzer [Thu, 26 Oct 2017 14:56:35 +0000 (16:56 +0200)]
drm/amd/display: Remove fb_location parameter from get_fb_info

It's dead code.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoamdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST
Michel Dänzer [Tue, 24 Oct 2017 09:15:52 +0000 (11:15 +0200)]
amdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST

Not used anymore.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Use real number of CRTCs and HPDs in set_irq_funcs
Michel Dänzer [Tue, 24 Oct 2017 09:13:34 +0000 (11:13 +0200)]
drm/amd/display: Use real number of CRTCs and HPDs in set_irq_funcs

Corresponding to the previous non-DC change.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoamdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcs
Michel Dänzer [Tue, 24 Oct 2017 09:03:21 +0000 (11:03 +0200)]
amdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcs

Hardcoding the maximum numbers could result in spurious error messages
from the IRQ state callbacks, e.g. on Polaris 11/12:

[drm:dce_v11_0_set_pageflip_irq_state [amdgpu]] *ERROR* invalid pageflip crtc 5
[drm:amdgpu_irq_disable_all [amdgpu]] *ERROR* error disabling interrupt (-22)

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Move conn_state to header
Harry Wentland [Thu, 19 Oct 2017 18:28:23 +0000 (14:28 -0400)]
drm/amd/display: Move conn_state to header

We'll need it in amdgpu_dm_mst_types.c as well.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: dal 3.1.10
Tony Cheng [Wed, 25 Oct 2017 04:15:05 +0000 (00:15 -0400)]
drm/amd/display: dal 3.1.10

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: correct DP is always in full range or bt609
Charlene Liu [Tue, 24 Oct 2017 22:19:06 +0000 (18:19 -0400)]
drm/amd/display: correct DP is always in full range or bt609

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: fix bug from last commit for hubbub
Yue Hin Lau [Tue, 24 Oct 2017 15:40:50 +0000 (11:40 -0400)]
drm/amd/display: fix bug from last commit for hubbub

fix memory leak

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Move hdr_metadata from plane to stream
Anthony Koo [Mon, 23 Oct 2017 21:02:02 +0000 (17:02 -0400)]
drm/amd/display: Move hdr_metadata from plane to stream

Need to move HDR Metadata from Surface to Stream since there is only one
infoframe possible per stream.

Also cleaning up some duplicate definitions.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Apply VQ adjustments in MPO case
SivapiriyanKumarasamy [Thu, 19 Oct 2017 17:41:30 +0000 (13:41 -0400)]
drm/amd/display: Apply VQ adjustments in MPO case

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: create new structure for hubbub
Yue Hin Lau [Mon, 23 Oct 2017 20:01:36 +0000 (16:01 -0400)]
drm/amd/display: create new structure for hubbub

instantiating new structure hubbub in resource.c

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: dal 3.1.09
Tony Cheng [Sat, 21 Oct 2017 22:32:15 +0000 (18:32 -0400)]
drm/amd/display: dal 3.1.09

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Added disconnect dchub.
Yongqiang Sun [Sat, 21 Oct 2017 19:52:40 +0000 (15:52 -0400)]
drm/amd/display: Added disconnect dchub.

Add disable ttu interface to dcn10, when remove
mpc, disable ttu as well.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: dal 3.1.08
Tony Cheng [Fri, 20 Oct 2017 18:27:47 +0000 (14:27 -0400)]
drm/amd/display: dal 3.1.08

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Not reset front end when program back end.
Yongqiang Sun [Tue, 17 Oct 2017 18:24:28 +0000 (14:24 -0400)]
drm/amd/display: Not reset front end when program back end.

Since front end is programmed before back end programming,
no need to reset front end in back end programming.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Power down front end in init_hw.
Yongqiang Sun [Fri, 20 Oct 2017 18:12:35 +0000 (14:12 -0400)]
drm/amd/display: Power down front end in init_hw.

front end is initialized during init_hw, but not
power gated. There are some left over valuse and will
cause some diags test failed. Power gated all front
end pipes will make sure every test has same starting
point.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Reject PPLib clock values if they are invalid
Andrew Jiang [Thu, 19 Oct 2017 18:43:36 +0000 (14:43 -0400)]
drm/amd/display: Reject PPLib clock values if they are invalid

We should be sticking with the default clock values if the values
obtained from PPLib are bogus.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: create new files for hubbub functions
Yue Hin Lau [Wed, 18 Oct 2017 15:59:42 +0000 (11:59 -0400)]
drm/amd/display: create new files for hubbub functions

moving hubbub functions to new file

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Complete TODO item: use new DRM iterator
Leo (Sunpeng) Li [Wed, 18 Oct 2017 19:32:41 +0000 (15:32 -0400)]
drm/amd/display: Complete TODO item: use new DRM iterator

Abandon new_crtcs array and use for_each_new iterator to acquire new
crtcs.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Fix styling of freesync code in commit_tail
Leo (Sunpeng) Li [Wed, 18 Oct 2017 18:31:08 +0000 (14:31 -0400)]
drm/amd/display: Fix styling of freesync code in commit_tail

For better readability.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move GART recovery into GTT manager v2
Christian König [Mon, 16 Oct 2017 14:50:32 +0000 (16:50 +0200)]
drm/amdgpu: move GART recovery into GTT manager v2

The GTT manager handles the GART address space anyway, so it is
completely pointless to keep the same information around twice.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: nuke amdgpu_ttm_is_bound() v2
Christian König [Fri, 27 Oct 2017 12:17:09 +0000 (14:17 +0200)]
drm/amdgpu: nuke amdgpu_ttm_is_bound() v2

Rename amdgpu_gtt_mgr_is_allocated() to amdgpu_gtt_mgr_has_gart_addr() and use
that instead.

v2: rename the function as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:fix random missing of FLR NOTIFY
Monk Liu [Tue, 24 Oct 2017 07:10:11 +0000 (15:10 +0800)]
drm/amdgpu:fix random missing of FLR NOTIFY

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/sriov:fix memory leak in psp_load_fw
Monk Liu [Tue, 19 Sep 2017 07:40:56 +0000 (15:40 +0800)]
drm/amdgpu/sriov:fix memory leak in psp_load_fw

for SR-IOV when doing gpu reset this routine shouldn't do
resource allocating otherwise memory leak

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:cleanup ucode_init_bo
Monk Liu [Tue, 17 Oct 2017 09:51:41 +0000 (17:51 +0800)]
drm/amdgpu:cleanup ucode_init_bo

1,no sriov check since gpu recover is unified
2,need CPU_ACCESS_REQUIRED flag for VRAM if SRIOV
because otherwise after following PIN the first allocated
VRAM bo is wasted due to some TTM mgr reason.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:cleanup in_sriov_reset and lock_reset
Monk Liu [Tue, 17 Oct 2017 07:11:12 +0000 (15:11 +0800)]
drm/amdgpu:cleanup in_sriov_reset and lock_reset

since now gpu reset is unified with gpu_recover
for both bare-metal and SR-IOV:

1)rename in_sriov_reset to in_gpu_reset
2)move lock_reset from adev->virt to adev

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:implement new GPU recover(v3)
Monk Liu [Wed, 25 Oct 2017 08:37:02 +0000 (16:37 +0800)]
drm/amdgpu:implement new GPU recover(v3)

1,new imple names amdgpu_gpu_recover which gives more hint
on what it does compared with gpu_reset

2,gpu_recover unify bare-metal and SR-IOV, only the asic reset
part is implemented differently

3,gpu_recover will increase hang job karma and mark its entity/context
as guilty if exceeds limit

V2:

4,in scheduler main routine the job from guilty context  will be immedialy
fake signaled after it poped from queue and its fence be set with
"-ECANCELED" error

5,in scheduler recovery routine all jobs from the guilty entity would be
dropped

6,in run_job() routine the real IB submission would be skipped if @skip parameter
equales true or there was VRAM lost occured.

V3:

7,replace deprecated gpu reset, use new gpu recover

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoamd/scheduler:imple job skip feature(v3)
Monk Liu [Wed, 25 Oct 2017 08:21:08 +0000 (16:21 +0800)]
amd/scheduler:imple job skip feature(v3)

jobs are skipped under two cases
1)when the entity behind this job marked guilty, the job
poped from this entity's queue will be dropped in sched_main loop.

2)in job_recovery(), skip the scheduling job if its karma detected
above limit, and also skipped as well for other jobs sharing the
same fence context. this approach is becuase job_recovery() cannot
access job->entity due to entity may already dead.

v2:
some logic fix

v3:
when entity detected guilty, don't drop the job in the poping
stage, instead set its fence error as -ECANCELED

in run_job(), skip the scheduling either:1) fence->error < 0
or 2) there was a VRAM LOST occurred on this job.
this way we can unify the job skipping logic.

with this feature we can introduce new gpu recover feature.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix indentation in amdgpu_display.h
Christian König [Mon, 23 Oct 2017 14:45:49 +0000 (16:45 +0200)]
drm/amdgpu: fix indentation in amdgpu_display.h

That was somehow completely of.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Only add stream to freesync when modeset required
Leo (Sunpeng) Li [Wed, 18 Oct 2017 18:22:23 +0000 (14:22 -0400)]
drm/amd/display: Only add stream to freesync when modeset required

This is a follow-up patch to:

Leo (Sunpeng) Li    Cleanup code that enables freesync

We should only add a stream to freesync if a modeset was requested, so
we don't fill the core freesync map with pointless streams.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Cleanup code that enables freesync
Leo (Sunpeng) Li [Tue, 17 Oct 2017 16:42:58 +0000 (12:42 -0400)]
drm/amd/display: Cleanup code that enables freesync

This is a follow-up patch to:

Bhawanpreet Lakha    Atomic freesync ASSERT fix

Changes:
- Combine to use one iterator
- Use new DRM iterators.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Atomic freesync ASSERT fix
Bhawanpreet Lakha [Mon, 16 Oct 2017 19:51:00 +0000 (15:51 -0400)]
drm/amd/display: Atomic freesync ASSERT fix

Changes to atomic set property for freesync.

Now In set property, just set the freesync variables and return 0.
Based on the variables call mod_freesync_set_user_enable() inside
commit_tail

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: add mod_freesync_user_enable to dm_connector_state
Alex Deucher [Mon, 4 Dec 2017 20:49:59 +0000 (15:49 -0500)]
drm/amd/display: add mod_freesync_user_enable to dm_connector_state

We don't currently expose variable refresh rate, but add the state to the
connector state to make it easier to maintain the support for it from a
hw support perspective while we figure out the uapi for drm.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: DMCU FW loading from PSP
Anthony Koo [Wed, 18 Oct 2017 20:14:40 +0000 (16:14 -0400)]
drm/amd/display: DMCU FW loading from PSP

Update the programming sequence to allow DMCU firmware to be loaded by
PSP. This code detects whether the firmware is loaded and does a check
to verify the expected interface version and checks for correct response
from micro controller.

Added registry key method to allow force loading of firmware from kernel
mode driver for test purposes. This is old method of firmware loading
without PSP.

Moved some init sequences into dc/dmcu.

Changed loading sequence to initialize IRAM after firmware completely
loaded. Firmware will now disable features that use IRAM
until initialized.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Set cursor position as per address.
Yongqiang Sun [Wed, 18 Oct 2017 15:59:13 +0000 (11:59 -0400)]
drm/amd/display: Set cursor position as per address.

In case of pipe split, cursor position should also be
programmed as per cursor address.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Explicit casting for grph object ids
Harry Wentland [Thu, 12 Oct 2017 14:23:22 +0000 (10:23 -0400)]
drm/amd/display: Explicit casting for grph object ids

C++ compilers don't like the implicit conversion

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: cleaning up hubp for dcn
Yue Hin Lau [Thu, 12 Oct 2017 18:46:38 +0000 (14:46 -0400)]
drm/amd/display: cleaning up hubp for dcn

removing duplicate functions, renaming struct mi_regs, etc.

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Clean some unneeded defines from ddc_service_types.h
Harry Wentland [Fri, 8 Sep 2017 14:41:46 +0000 (10:41 -0400)]
drm/amd/display: Clean some unneeded defines from ddc_service_types.h

Remove defines we no longer need

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Cleanup some fail labels in dcn10_resource
Harry Wentland [Thu, 28 Sep 2017 19:39:41 +0000 (15:39 -0400)]
drm/amd/display: Cleanup some fail labels in dcn10_resource

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Adding DCN1 registers
Mikita Lipski [Tue, 17 Oct 2017 14:53:43 +0000 (10:53 -0400)]
drm/amd/display: Adding DCN1 registers

Registers added to definition list that are required
for multi display synchronization

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Check cursor address before program.
Yongqiang Sun [Tue, 17 Oct 2017 18:54:58 +0000 (14:54 -0400)]
drm/amd/display: Check cursor address before program.

Program cursor attributes during set mode is only needed
in case of pipe slipt, bottom pipe should be programmed
same as top pipe. Need to program if address is 0.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Move lock to front end program.
Yongqiang Sun [Tue, 17 Oct 2017 18:48:11 +0000 (14:48 -0400)]
drm/amd/display: Move lock to front end program.

Moved lock and unlock to apply_ctx_to_surface, since all
the front end programming is within apply_ctx_to_surface.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/display: Add APU cap in dc_caps
Anthony Koo [Mon, 16 Oct 2017 14:43:59 +0000 (10:43 -0400)]
drm/amd/display: Add APU cap in dc_caps

Some features should only be enabled on APUs or should not
be enabled on APUs.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: delete duplicated code.
Rex Zhu [Fri, 20 Oct 2017 06:52:43 +0000 (14:52 +0800)]
drm/amdgpu: delete duplicated code.

the variable ref_clock was assigned same
value twice in same function.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/pp: delete an outdated comment in amd_powerplay.c
Rex Zhu [Mon, 9 Oct 2017 03:30:42 +0000 (11:30 +0800)]
drm/amd/pp: delete an outdated comment in amd_powerplay.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/pp: implement notify_smu_memory_info on Powerplay
Rex Zhu [Mon, 9 Oct 2017 04:22:21 +0000 (12:22 +0800)]
drm/amd/pp: implement notify_smu_memory_info on Powerplay

Used to set up smu power logging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add new pp function point notify_smu_memory_info
Rex Zhu [Fri, 15 Sep 2017 10:34:42 +0000 (18:34 +0800)]
drm/amdgpu: add new pp function point notify_smu_memory_info

Used to set up smu power logging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add header kgd_pp_interface.h
Rex Zhu [Fri, 29 Sep 2017 07:58:19 +0000 (15:58 +0800)]
drm/amdgpu: add header kgd_pp_interface.h

move powerplay and amdgpu shared structures
and definitions to kgd_pp_interface.h.  This
is the interface between the base driver
and powerplay.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move struct amd_powerplay to amdgpu.h
Rex Zhu [Fri, 29 Sep 2017 08:07:14 +0000 (16:07 +0800)]
drm/amdgpu: move struct amd_powerplay to amdgpu.h

Clean up the interface.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: move functions to amd_pm_funcs table
Rex Zhu [Thu, 26 Oct 2017 03:55:23 +0000 (23:55 -0400)]
drm/amd/powerplay: move functions to amd_pm_funcs table

those functions are exported to DC

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move DC and PP shared data structures to dm_pp_interface.h
Rex Zhu [Thu, 28 Sep 2017 07:20:51 +0000 (15:20 +0800)]
drm/amdgpu: move DC and PP shared data structures to dm_pp_interface.h

Move the display/power interfaces to one place.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove extra parameter from amdgpu_ttm_bind() v2
Christian König [Mon, 16 Oct 2017 15:24:21 +0000 (17:24 +0200)]
drm/amdgpu: remove extra parameter from amdgpu_ttm_bind() v2

We always use the BO mem now.

v2: minor rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: don't wait interruptible while binding GART space
Christian König [Wed, 25 Oct 2017 19:37:35 +0000 (21:37 +0200)]
drm/amdgpu: don't wait interruptible while binding GART space

Display can't seem to handle this correctly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix pin domain compatibility check
Christian König [Mon, 23 Oct 2017 15:29:36 +0000 (17:29 +0200)]
drm/amdgpu: fix pin domain compatibility check

We need to test if any domain fits, not all of them.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: always bind pinned BOs
Christian König [Fri, 20 Oct 2017 11:12:12 +0000 (13:12 +0200)]
drm/amdgpu: always bind pinned BOs

We always need to bind pinned BOs, not just when the caller requested the
address.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>