Michal Simek [Wed, 30 May 2018 09:28:57 +0000 (11:28 +0200)]
cmd: fpga: Clean wrong_parms handling
There is no reason to check parameters in separate switch. Check them
directly when they are read. Also there is no reason to check loadmk
case separately because fpga_data address must be non zero too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Mon, 4 Jun 2018 11:57:19 +0000 (13:57 +0200)]
cmd: fpga: Remove parameter checking from fpga loadfs command
Parameter checking is dead code because all the time there must be all
params assigned. If they are not assigned there is no 9th parameters
passed and checking before return CMD_RET_USAGE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 30 May 2018 09:18:38 +0000 (11:18 +0200)]
cmd: fpga: Move parameter checking for loadfs/loads
There is no reason to check parameters in separate switch before main
one. This patch is simplifying error path and checking parameters right
after assignment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 30 May 2018 08:04:34 +0000 (10:04 +0200)]
cmd: fpga: Cleanup error handling in connection to FPGA_NONE
Incorrect command is already handled and FPGA_NONE should be used only
one. In case of error CMD_RET_USAGE can be returned directly without any
addition logic around.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
+ if (dev == FPGA_INVALID_DEVICE) {
+ puts("FPGA device not specified\n");
+ op = FPGA_NONE;
+ }
which simply broke one command flow which was
setenv fpga <dev>
fpga loadmk <addr> // legacy image
fpga loadmk <addr>:<fit_image_name> //fit image
Also this sequence for FIT image is completely broken
setenv fpga <dev>
setenv fpgadata <addr>:<fit_image_name>
fpga loadmk
(Note: For legacy images this is working fine).
even from code I don't think this has ever worked properly
for fit image (dev = FPGA_INVALID_DEVICE should be rejected
by fpga core). Fit image support was in 2008 added by:
"[new uImage] Add new uImage fromat support to fpga command"
(sha1: c28c4d193dbfb20b2dd3a5447640fd6de7fd0720)
Just a summary of these facts that none found this for pretty long time
it shouldn't be a problem to remove this flow (without fpga dev)
completely to simplify the code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs
If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".
=> nand info
Device 0: nand0, sector size 256 KiB
Page size 4096 b
OOB size 224 b
Erase size 262144 b
subpagesize 4096 b
options 0x00104200
bbt options 0x00060000
=> nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
...
The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.
Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]
Marek Vasut [Sun, 9 Sep 2018 14:30:11 +0000 (16:30 +0200)]
fdt: fix get_next_memory_node()
The get_next_memory_node() always sets mem to -1 , which is incorrect,
because then every iteration of memory bank parsing will start from the
first memory bank instead of the previous one.
On systems with 1 memory bank defined in DT and CONFIG_NR_DRAM_BANKS=4 ,
like ie. r8a77965-salvator-x , this will result in U-Boot incorrectly
reporting four identical memory banks with the same memory configuration.
Fix this by setting mem to startoffset value, which restores the behavior
before the fixed patch was applied.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jens Wiklander <jens.wiklander@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Fixes: 97a42c833a79 ("fdt: fix fdtdec_setup_memory_banksize()") Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZynqMP}
ARM: Specify aligned address for secure section instead of using attributes
In commit a1274cc94a20 ("ARM: Page align secure section only when it is
executed in situ"), we used output section attributes (the "ALIGN"
keyword after the colon) to specify the alignment requirements. Using
the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1].
Binutils maintainer Alan Modra suggested the former method would still
work. Since both methods achieve the same result, this patch does just
that. This fixes the "reboot after bootm" issue we've been seeing on
sunxi when booting non-secure.
ARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0
QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and
MMIO. Thus we need to add them to our MMU map or U-Boot will crash with
a Synchronous Abort during PCI-E probing when it tries to access the
unmapped ECAM memory area.
Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Tested-by: Jonathan Gray <jsg@jsg.id.au>
When re-syncing the DTS files from the kernel, something caused
the MMC driver to no longer detect the MMC card. Undoing the
CD-invert appears to fix the issue.
Fixes: 34422ba4c621 ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit
with Linux 4.18-RC4")
Stefan Agner [Mon, 6 Aug 2018 07:19:19 +0000 (09:19 +0200)]
colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support
This commit adds support for the Toradex Colibri iMX7D 1GB Computer
on Module. The module is very similar to the Colibri iMX7D 512MB
but uses eMMC instead of raw NAND. This patch introduces a new
board specific Kconfig symbol to select between the two flash
options.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch>
Anson Huang [Wed, 8 Aug 2018 01:17:48 +0000 (09:17 +0800)]
imx: mx7: psci: improve cpu hotplug flow
This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.
Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.
Alex Kiernan [Tue, 24 Jul 2018 07:29:40 +0000 (07:29 +0000)]
Cleanup CONFIG_BOOTDELAY on cl-som-imx7
CONFIG_BOOTDELAY has been migrated to Kconfig, but cl-som-imx7 was
missed. We can just delete the assignments as the config already has
the correct value.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Martin Kaiser [Sat, 21 Jul 2018 17:47:03 +0000 (19:47 +0200)]
watchdog: mx25: use the imx_watchdog driver for mx25
The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.
To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.
This fixes an issue when booting an mx25 chip via usb/serial. In this
case, the boot rom will always enable the watchdog. If u-boot is running
in interactive mode and the watchdog is not serviced, the system is
rebooted when the watchdog expires.
Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Ye Li [Thu, 28 Jun 2018 02:30:53 +0000 (19:30 -0700)]
imx: imx7d-sdb: Add DM QSPI support
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.
Other changes to support the DM QSPI:
- Add QSPI node and alias spi0.
- Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
conflict
- Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to
align with kernel and also present the conflict.
- Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to
"spi-flash"
- Remove iomux settings of qspi in board codes which is not needed
for DM driver.
Ye Li [Thu, 28 Jun 2018 02:27:00 +0000 (19:27 -0700)]
imx: imx6sx-sabreauto: convert to use DM QSPI driver
To support DM QSPI driver:
- Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
to "spi-flash" and add "num-cs" property.
- Enable DM SPI and DM SPI FLASH configurations
- Remove iomux settings of qspi1 in board codes which is not needed
for DM driver.
Ye Li [Thu, 28 Jun 2018 02:26:59 +0000 (19:26 -0700)]
imx: imx6sx-sdb: Enable DM QSPI driver
To support DM QSPI driver
- Add spi0 and spi1 alias for qspi1 and qspi2.
- Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
to "spi-flash" and add "num-cs" property.
- Enable DM SPI/QSPI relavent configurations
- Remove iomux settings of qspi2 in board codes which is not needed
for DM driver.
- Add sf default settings. So running "sf probe" can detect the flash
Masahiro Yamada [Fri, 24 Aug 2018 10:30:15 +0000 (19:30 +0900)]
Make kmalloc'ed memory really DMA-safe
In Linux, the memory returned by kmalloc() is DMA-capable.
However, it is not true in U-Boot.
At a glance, kmalloc() in U-Boot returns address aligned with
ARCH_DMA_MINALIGN. However, it never pads the allocated memory.
This half-way house is completely useless because calling kmalloc()
and malloc() in this order causes a cache sharing problem.
Change the implementation to call malloc_cache_aligned(), which
allocates really DMA-capable memory.
hisilicon: hikey: Update instructions based on latest source
Update the HiKey board instructions based on the latest source
available. These instructions are derived from the ATF platform doc.
While updating the instructions, some comments on ATF issue has been
removed since it is fixed in latest ATF source.
Bin Meng [Fri, 24 Aug 2018 04:28:58 +0000 (21:28 -0700)]
x86: zimage: Remove acpi_rsdp_addr propagation to kernel boot parameters
As of today, the proposal of adding "acpi_rsdp_addr" to the kernel
boot protocol does not make its way to the kernel mainline. This
creates some confusion if we leave it in the U-Boot code base.
Remove it for now until we have a clear picture with kernel upstream.
Note this eventually does a partial revert to commit 941d69ade7cf
("x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 23 Aug 2018 15:24:10 +0000 (08:24 -0700)]
x86: zimage: Support booting Linux kernel from an EFI payload
At present Linux kernel loaded from U-Boot as an EFI payload does
not boot. This fills in kernel's boot params structure with the
required critical EFI information like system table address and
memory map stuff so that kernel can obtain essential data like
runtime services and ACPI table to boot.
With this patch, now U-Boot as an EFI payload becomes much more
practical: it is another option of kernel bootloader, ie, can be
a replacement for grub.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ley Foon Tan [Tue, 28 Aug 2018 16:08:48 +0000 (00:08 +0800)]
usb: dwc2: Add reset ctrl to driver
Add code to reset all reset signals as in usb DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Fri, 24 Aug 2018 19:03:14 +0000 (21:03 +0200)]
pci: rmobile: Filter out device 1 and 2
Only PCI device 1 and 2 is populated on the R-Car Gen2 internal
PCIe controller. Ignore all other devices. This fix prevents a
duplication of OHCI controller response on slot 0 and 1.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Tue, 7 Aug 2018 10:27:10 +0000 (12:27 +0200)]
usb: ehci: Add PHY support to ehci-pci
Add support for operating a PHY attached to ehci-pci. There are
systems where the EHCI controller is internally wired to a PCI
bus and has a PHY connected to it as well, ie. the R-Car Gen2.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Thu, 16 Aug 2018 12:37:03 +0000 (14:37 +0200)]
phy: Fix warning due to missing definition of structure
Fix this sort of warning if generic-phy.h is included:
include/generic-phy.h:52:42: warning: ‘struct ofnode_phandle_args’ declared inside parameter list will not be visible outside of this definition or declaration
int (*of_xlate)(struct phy *phy, struct ofnode_phandle_args *args);
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Copy missing Kernel patch to make SLEWCTRL_SLOW available in device tree
and to correct the value of SLEWCTRL_FAST.
After this patch, the Kernel and U-boot device tree settings for
SLEWCTRL have the same effect.
"
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness. Current users of the macro (i2c and mdio) are left
unmodified as SLEWCTRL_FAST was the macro used and actual desired state.
Tested on am335x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
"
Signed-off-by: Christian Amann <Christian.Amann@de.bosch.com>
Marek Vasut [Tue, 21 Aug 2018 13:53:33 +0000 (15:53 +0200)]
env: ubi: Add missing ENV_NAME
Add missing environment name for UBI, to prevent this NULL in output:
Loading Environment from <NULL>...
and rather have a valid UBI there:
Loading Environment from UBI...
Neil Stainton [Mon, 20 Aug 2018 15:46:19 +0000 (15:46 +0000)]
u-boot: align cache flushes in load_elf_image_shdr to line boundaries
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.
Currently when using bootelf to load an image on Arm, several warnings
such as the following appear in the console:
CACHE: Misaligned operation at range [87800000, 8783c5e0]
CACHE: Misaligned operation at range [8783c5e0, 8784b3e0]
Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Reword commit message to include the info after the --- which
included the Signed-off-by line, and change ' at ' to '@'] Signed-off-by: Tom Rini <trini@konsulko.com>
In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead. This patch updates
the declaration in timer.h accordingly.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
[common/avb_verify.c:738] -> [common/avb_verify.c:741]: (warning) \
Either the condition 'ops' is redundant or there is possible null \
pointer dereference: ops.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:07 +0000 (02:43 +0200)]
common: avb_verify: Fix memory leaks
Cppcheck (v1.85) reports w/o this patch:
[common/avb_verify.c:351]: (error) Memory leak: part
[common/avb_verify.c:356]: (error) Memory leak: part
[common/avb_verify.c:361]: (error) Memory leak: part
[common/avb_verify.c:366]: (error) Memory leak: part
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:05 +0000 (02:43 +0200)]
common: kconfig: Mark AVB_VERIFY as dependent on PARTITION_UUIDS
Avoid below compiler [1] errors, reproduced with configuration [2]:
common/avb_verify.c: In function ‘get_unique_guid_for_partition’:
common/avb_verify.c:692:31: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
uuid_size = sizeof(part->info.uuid);
^
common/avb_verify.c:696:29: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
memcpy(guid_buf, part->info.uuid, uuid_size);
^
LD drivers/built-in.o
make[2]: *** [scripts/Makefile.build:278: common/avb_verify.o] Error 1
common/avb_verify.c: In function ‘avb_find_dm_args’:
common/avb_verify.c:179:30: warning: left-hand operand of comma expression has no effect [-Wunused-value]
for (i = 0; i < AVB_MAX_ARGS, args[i]; ++i) {
libavb: Handle wrong hashtree_error_mode in avb_append_options()
Exit with AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
when hashtree_error_mode value passed to avb_append_options()
is unknown (not from AvbHashtreeErrorMode enum).
Otherwise, default value is not handled in the
switch(hashtree_error_mode), which causes below compile warning:
lib/libavb/avb_cmdline.c: In function ‘avb_append_options’:
lib/libavb/avb_cmdline.c:354:13: warning: ‘dm_verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
new_ret = avb_replace(
~~~~~~~~^~~~~~~~~~~~~~
slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:363:8: warning: ‘verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
if (!cmdline_append_option(
^~~~~~~~~~~~~~~~~~~~~~
slot_data, "androidboot.veritymode", verity_mode)) {
Marek Vasut [Sat, 18 Aug 2018 14:00:31 +0000 (16:00 +0200)]
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Sat, 18 Aug 2018 17:13:28 +0000 (19:13 +0200)]
ARM: dts: socfpga: Flag timer clock as pre-reloc
Flag timer clock as DM pre-reloc, so that a timer driver can be used and
it can extract information about it's clock rate using the clock framework.
This patch also moves some of the pre-reloc flags into the core dtsi file,
this is because the timer is not board specific, but rather is used on all
boards.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Sat, 18 Aug 2018 17:11:52 +0000 (19:11 +0200)]
ARM: socfpga: Reorder Arria10 SPL
The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.
The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 17 Aug 2018 08:22:03 +0000 (16:22 +0800)]
arm: socfpga: stratix10: Fix mailbox urgent command with urgent register
According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 17 Aug 2018 08:22:02 +0000 (16:22 +0800)]
arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
Code checking and setting EMAC use fpga is in
populate_sysmgr_fpgaintf_module(). So, call to sysmgr_pinmux_init()
instead of populate_sysmgr_pinmux().
In sysmgr_pinmux_init(), it will call to both populate_sysmgr_pinmux()
and populate_sysmgr_fpgaintf_module().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Jagdish Gediya [Thu, 23 Aug 2018 17:23:33 +0000 (22:53 +0530)]
armv8: layerscape: Build u-boot-with-spl.bin for selected boards
This patch reverts the changes made for ls1088a and ls2080a
based boards in commit d61233a854030 ("armv8: layerscape: Drop
u-boot-with-spl.bin for selected boards").
u-boot-with-spl.bin is required for Gen3 based SoC where internal
ROM copy data in the internal memory
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> CC: Priyanka Jain <priyanka.jain@nxp.com> CC: Pramod Kumar <pramod.kumar_1@nxp.com> CC: Ashish Kumar <ashish.kumar@nxp.com> CC: York Sun <york.sun@nxp.com> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Jagan Teki [Fri, 20 Jul 2018 07:14:01 +0000 (12:44 +0530)]
usb: musb-new: Call musb_platform_exit from musb_stop
musb stop is musb core call during unregister or shutting down
gadget or host musb. For graceful exit add musb_platform_exit
on musb_stop so-that it can exit the musb platform driver as well.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:14:00 +0000 (12:44 +0530)]
usb: musb-new: sunxi: Add proper musb exit support
musb have platform ops to do proper graceful exit,
so add the exit call and move musb platform exit code
instead of keeping it in driver remove.
This make proper shutdown of musb where .remove will
call disable, exit serially via musb_stop.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:59 +0000 (12:43 +0530)]
musb-new: sunxi: Access ahb_reset0_cfg via ccm offset
reset0 is not available for sun4i, 5i and 7i so access
the reset0 offset from ccm via driver data for relevant
Allwinner SoC. this will eventually drop the existing
ifdef for SUN6I.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:57 +0000 (12:43 +0530)]
usb: musb-new: sunxi: Allocate struct phy in private
Allocate struct phy in private structure instead of allocating
locally and assign it to a pointer. This eventually fix miss
alignment phy which is used in another functions.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:56 +0000 (12:43 +0530)]
usb: musb-new: Fix improper musb host pointer
When MUSB is operating in peripheral mode, probe registering
musb core using musb_register which intern return int value
for validation. so there is no scope to preserve struct musb
pointer but the same can be used in .remove musb_stop.
So fix this by return musb_register with struct musb pointer.
Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>