David Sebek [Thu, 30 Mar 2023 21:51:14 +0000 (17:51 -0400)]
rockchip: Fix incorrect constant name in RAM init code
A condition in the rk3399 RAM initialization code used the old
CONFIG_RAM_RK3399_LPDDR4 constant name. This commit changes the
condition to use the correct CONFIG_RAM_ROCKCHIP_LPDDR4 constant.
Assigning the value of a variable to itself should be avoided.
Addresses-Coverity-ID: 451089 ("Evaluation order violation") Fixes: 8809169dacd6 ("efi_loader: fix device-path for USB devices") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We use short device-paths in boot options so that a file on a block device
can be found independent of the port into which the device is plugged.
Usb() device-path nodes only contain port and interface information and
therefore cannot identify a block device.
UsbWwi() device-path nodes contain the serial number of USB devices.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 379ac6c22605 ("Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Fabio Estevam [Wed, 22 Mar 2023 19:59:31 +0000 (16:59 -0300)]
imx6sx-udoo-neo-basic: Introduce the u-boot.dtsi
After the conversion to DM_SERIAL in commit 4de0f15ee44d ("udoo_neo:
Select DM_SERIAL and drop iomux board level init") the SPL log is gone
and the U-Boot proper log becomes incomplete:
Core: 80 devices, 18 uclasses, devicetree: separate
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: eth0: ethernet@2188000
Hit any key to stop autoboot: 0
Introduce the u-boot.dtsi file that passes the u-boot,dm-pre-reloc
properties to the relevant nodes so that UART can be used early in SPL.
With this change, the complete SPL and U-Boot messages are seen again.
Simon Glass [Mon, 27 Mar 2023 19:34:14 +0000 (08:34 +1300)]
cli: Correct handling of invalid escape sequences in cread_line()
The second call to cli_ch_process() is in the wrong place, meaning that
the one of the characters of an invalid escape sequence is swallowed
instead of being returned.
Fix the bug and add a test to cover this.
This behaviour matches that of the code before cli_getch() was
introduced. This was verified on the commit before c27dce8c77 i.e.:
06a892504cb ("sandbox: Enable mmc command and legacy images")
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Mon, 27 Mar 2023 19:34:13 +0000 (08:34 +1300)]
cli: Correct several bugs in cli_getch()
This function does not behave as expected when unknown escape sequences
are sent to it:
- it fails to store (and thus echo) the last character of the invalid
sequence
- it fails to set esc_len to 0 when it finishes emitting the invalid
sequence, meaning that the following character will appear to be part
of a new escape sequence
- it processes the first character of the rejected sequence as a valid
character, just starting the sequence all over again
The last two bugs conspire to produce an "impossible condition #876"
message which is the main symptom of this behaviour.
Fix these bugs and add a test to verify the behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Mon, 27 Mar 2023 15:16:51 +0000 (11:16 -0400)]
Merge branch '2023-03-27-rockchip-rk3399-fixes'
- A series of minor cleanups to DISTRO_DEFAULTS and BOOTSTD so that the
rk3399 bootstd migration can be complete and functional now, and make
future migrations easier.
Tom Rini [Fri, 24 Mar 2023 20:58:15 +0000 (16:58 -0400)]
rockchip: Use BOOTSTD_DEFAULTS if not DISTRO_DEFAULTS
When we do not enable DISTRO_DEFAULTS (generally, to get distro_bootcmd)
we instea do want to imply BOOTSTD_DEFAULTS so that when using bootstd
the general distro boot functionality will still work.
Simon Glass [Fri, 24 Mar 2023 20:58:13 +0000 (16:58 -0400)]
boot: Create a common BOOT_DEFAULTS for distro and bootstd
These two features use a lot of common options. Move them into a common
CONFIG to reduce duplication.
Use 'select' for most options since these are things that boards aren't
supposed to override. For now it is not possible to disable
BOOT_DEFAULTS but we may take another look later.
Note that five options use 'imply' to match existing behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Rework a bit so we don't grow so many platforms unintentionally] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 24 Mar 2023 20:58:10 +0000 (16:58 -0400)]
rockchip: Drop bootstage stash in TPL and SPL for rockpro64
Unfortunately the IRAM used to stash the bootstage records in TPL
becomes inaccessible after SPL runs. Presumably this is because of ATF
taking it over.
We could move the stash to another address in SPL, before passing it to
U-Boot proper. But it seems easier to wait until we have support for
standard passage[1] which should not be too far away.
EFI device paths for block devices must be unique. If a non-unique device
path is discovered, probing of the block device fails.
Currently we use UsbClass() device path nodes. As multiple devices may
have the same vendor and product id these are non-unique. Instead we
should use Usb() device path nodes. They include the USB port on the
parent hub. Hence they are unique.
A USB storage device may contain multiple logical units. These can be
modeled as Ctrl() nodes.
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 24 Mar 2023 21:00:41 +0000 (17:00 -0400)]
Merge branch 'rpi-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- Fixes for booting newer revs of the SoC in the Raspberry Pi 4
- Propagate some firmware DT properties to the loaded DT
- Update the Zero2W upstream DT name
Due to this change in firmware behavior, bcm2835_get_mmc_clock now
returns a clock rate of zero since we do not issue SET_CLOCK_RATE.
This results in degraded MMC performance.
SET_CLOCK_RATE fixes the clock to a specific value and disables scaling
so is not an ideal solution.
Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if
GET_CLOCK_RATE returns zero.
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tom Rini [Wed, 22 Mar 2023 18:01:01 +0000 (14:01 -0400)]
Merge branch '2023-03-22-assorted-fixes'
- Assorted TI platform fixes, correct location of NXP boot format git
repository, don't try and mount partitions that are too small to be
ext4 as ext4, handle .bin files in .gitattributes, flush out panic
messages for sure, and correct console location on Arm total_compute.
Setting RX flow error handling will stall the channel until descriptors
are available to move RX data. Setting this bit causes issues when
tearing down ethernet DMA channel at the end of TFTP transfer as
unrelated network packets can cause teardown to stall indefinitely waiting
for driver to queue add more desc leading to channel hang with error
logs:
udma_stop_dev2mem TIMEOUT !
udma_stop_dev2mem: peer not stopped TIMEOUT !
udma_stop_dev2mem TIMEOUT !
Fix this by clearing rx_error_handling similar to how its done for UDMA
as part of udma_alloc_rchan_sci_req()
This fixes occasional TFTP Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.
To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.
arm: mach-k3: am62: move scratch board area to HSM RAM
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
Tony Dinh [Wed, 15 Mar 2023 00:24:26 +0000 (17:24 -0700)]
console: Use flush() before panic and reset
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.
Tom Rini [Mon, 20 Mar 2023 21:52:42 +0000 (17:52 -0400)]
Merge tag 'u-boot-rockchip-20230319' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for rockchip timer driver;
- Fix for rk3568 and rk3588 boot device and clock driver;
- Fix for rk3568 reset handler;
- Fix for rk3568 sdhci DLL at 52MHz;
Marek Vasut [Sat, 18 Mar 2023 11:30:53 +0000 (12:30 +0100)]
clk: renesas: Pack reset identifier before look up
The reset identifier must be processed via MOD_CLK_PACK() before it is
used to look up register and bit within reset_regs or reset_clear_regs
arrays, otherwise completely bogus register and bit is picked from the
arrays, one which may even be out of range.
Fixes: 97c9d810b50 ("clk: renesas: Add and enable CPG reset driver") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Tue, 7 Mar 2023 15:30:58 +0000 (16:30 +0100)]
rockchip: timer: rockchip_timer: fix compatible and driver name
In the binding for the Rockchip timer the compatible string
consists of a SoC orientated string and a fall back string
"rockchip,rk3288-timer", so remove all unneeded ones and
fix driver name.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 14 Mar 2023 00:38:32 +0000 (00:38 +0000)]
mmc: rockchip_dw_mmc: Fix get_mmc_clk return value
The get_mmc_clk ops is expected to set a clock rate and return the
configured rate as an unsigned value. However, if clk_set_rate fails,
e.g. using a fixed rate clock, a negative error value is returned.
The mmc core will treat this as a valid unsigned rate and tries to
configure a divider based on this bogus clock rate.
Use 0 as the return value when setting clock rate fails, the mmc core
will configure to use bypass mode instead of using a bogus divider.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 14 Mar 2023 00:38:31 +0000 (00:38 +0000)]
rockchip: tinker-rk3288: Use common BOOT_TARGET_DEVICES
Building U-Boot for Tinker Board with USB or NET Kconfig option disabled
result in the following build error:
In file included from include/configs/rk3288_common.h:29,
from include/configs/tinker_rk3288.h:14,
from include/config.h:3,
from include/common.h:16,
from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/tinker_rk3288.h:21:9: note: in expansion of macro 'BOOTENV_DEV_NAME'
21 | func(USB, usb, 0) \
| ^~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES'
454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
| ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS'
474 | BOOTENV_BOOT_TARGETS \
| ^~~~~~~~~~~~~~~~~~~~
include/configs/rk3288_common.h:40:9: note: in expansion of macro 'BOOTENV'
40 | BOOTENV
| ^~~~~~~
include/env_default.h:122:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS'
122 | CFG_EXTRA_ENV_SETTINGS
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:29:36: note: to match this '{'
29 | const char default_environment[] = {
| ^
make[2]: *** [scripts/Makefile.build:256: env/common.o] Error 1
The BOOT_TARGET_DEVICES defined in rockchip-common.h include the same
devices as defined in tinker_rk3288.h, remove the board specific one to
fix building with USB or NET option disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 14 Mar 2023 00:38:24 +0000 (00:38 +0000)]
rockchip: rk3568-rock-3a: Sync device tree from linux
Running U-Boot from eMMC on a ROCK 3 Model A result in the following:
U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
Trying to boot from MMC1
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The sdhci node is missing in board device tree, sync device tree from
linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
nodes related to using a WiFi and BT module in the M2 slot.
Fixes: 7f3b3e354b3a ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Wed, 15 Mar 2023 16:01:55 +0000 (12:01 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Per Andre:
[T]hese two patches containing just devicetree updates for
Allwinner boards.
I was still hoping for a review, since we cannot import the files from
the Linux tree verbatim, but managed to write some filter script that
convinced me that the changes are fine.
The files are from Linux v6.2-rc2, but are identical to the v6.2
release.
This patch fixes u-boot hanging on the first printf("%x", val).
Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.
Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.
The FSL eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
ColdFire also uses eSHDC controller, as in arm and powerpc,
so adding sdhc_per_clk to arch_global_data.
Antoine Mazeas [Fri, 19 Aug 2022 08:56:46 +0000 (10:56 +0200)]
rpi: Copy eth PHY address from fw DT to loaded DT
Some Raspberry Pi 400 boards, specifically rev 1.1, have a different
address for the ethernet PHY device than what is provided by the kernel
DTB. The correct address is provided by the firmware, so we should carry
it over into the loaded device tree so that ethernet works on such boards.
Signed-off-by: Antoine Mazeas <antoine@karthanis.net> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Antoine Mazeas [Fri, 19 Aug 2022 08:56:45 +0000 (10:56 +0200)]
rpi: Copy properties from firmware dtb to the loaded dtb
The RPI firmware adjusts several property values in the dtb it passes
to u-boot depending on the board/SoC revision. Inherit some of these
when u-boot loads a dtb itself. Specificaly copy:
* /model: The firmware provides a more specific string
* /memreserve: The firmware defines a reserved range, better keep it
* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as
present on rpi 400 and some rpi 4B boards) has different values for
these then the B0T revision. So these need to be adjusted to boot on
these boards
* blconfig: The firmware defines the memory area where the blconfig
stored. Copy those over so it can be enabled.
* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage
of that.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Signed-off-by: Antoine Mazeas <antoine@karthanis.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Masahisa Kojima [Tue, 21 Feb 2023 02:33:17 +0000 (11:33 +0900)]
efi_loader: update SetVariable attribute check
UEFI specification v2.10 says that
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated and
EFI_UNSUPPORTED should be returned in SetVariable variable service.
Current implementation returns EFI_INVALID_PARAMETER,
let's fix the return value.
Together with above change, this commit also updates the SetVariable
attribute check to be aligned with the EDK2 reference implementation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tam Nguyen [Mon, 27 Feb 2023 22:58:48 +0000 (23:58 +0100)]
ARM: dts: renesas: Enable sysinfo on R-Car D3 Draak
Enable support for sysinfo on R-Car D3 Draak board. The sysinfo is used
e.g. to access and decode board-specific information and then in turn
used by board-info to print those information.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop compatible from I2C node, this is in r8a77995.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
Tam Nguyen [Mon, 27 Feb 2023 22:58:47 +0000 (23:58 +0100)]
ARM: dts: renesas: Enable sysinfo on R-Car V3H Condor/Condor-I
Add new sysinfo IDs for R-Car V3H Condor/Condor-I .
Enable support for sysinfo on R-Car V3H Condor/Condor-I. The sysinfo is
used e.g. to access and decode board-specific information and then in
turn used by board-info to print those information.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop compatible from I2C node, this is in r8a77980.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Update the commit message, note the new sysinfo IDs.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
Tam Nguyen [Mon, 27 Feb 2023 22:58:46 +0000 (23:58 +0100)]
sysinfo: rcar3: Fix Draak and Eagle board code
Correct the board code ID based on the hardware documentation
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Tue, 28 Feb 2023 21:16:02 +0000 (22:16 +0100)]
clk: renesas: Always select DM_RESET to prevent inobvious failure of rst_gen3 subdriver
The CLK_RCAR_GEN3 registers two subdrivers, clk_gen3 and rst_gen3.
The former depends on the clock framework, which is always enabled
in this context of clock framework driver, while the later depends
on reset framework which may not always be enabled.
Ensure the reset framework is also always enabled to prevent inobvious
early boot time bind failure of the CPG driver, which leads to system
showing no activity and is difficult to debug.
Note that one possible approach to debug this is to use CONFIG_DEBUG_UART
and add debug printascii()s into the drivers/clk/renesas/clk-rcar-gen3.c .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
In case one of the calls in probe fail, trigger a fail path and
undo all the steps done in probe until the point of failure.
The current implementation failed to stop controller clock and
free claimed clock, so fix that. Furthermore, print return code
in error prints for easier debugging.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The prior stage bootloader might have left the SDnCKCR register in completely
arbitrary state before passing control to U-Boot, which includes the register
being populated with incorrect values. Currently the SDHI driver will attempt
to use clock framework to configure SDn clock, which may fail in case SDnCKCR
contains invalid values for the SDnH clock, because the clock framework would
not be able to determine SDnH clock rate and would get -EINVAL instead, which
in turn would not allow the clock framework to determine the correct SDn clock
divider ratio.
This failure occurs specifically in case SDnCKCR reads back 0x209 .
Correct the problem by first setting default SDnH clock rate to 800 MHz, thus
assuring the SDnCKCR SDnH bits are correct, and only afterward set up the SDn
clock rate to default 200 MHz.
Note that the SDHI driver may reconfigure SDnH clock later based on IOS
settings obtained from the attached card, the 800 MHz set up here is only
the default value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This configuration setting is only relevant if the board supports USB.
It should not be in the main menu but in the USB menu.
The setting is only relevant in USB host mode.
Fixes: f4df76749e1d ("usb: hub: allow to increase HUB_DEBOUNCE_TIMEOUT") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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