From: Manish Pandey Date: Wed, 11 Jan 2023 21:41:07 +0000 (+0000) Subject: refactor(el3_runtime): introduce save_x30 macro X-Git-Tag: baikal/aarch64/sdk5.10~1^2~202^2~1 X-Git-Url: https://git.baikalelectronics.ru/sdk/?a=commitdiff_plain;h=d87c0e277fcc6b07112c0ee6d1aecbc2200055a5;p=arm-tf.git refactor(el3_runtime): introduce save_x30 macro Most of the macros/routine in vector entry need a free scratch register. Introduce a macro "save_x30" and call it right at the begining of vector entries where x30 is used. It is more exlicit and less error prone Signed-off-by: Manish Pandey Change-Id: I617f3d41a120739e5e3fe1c421c79ceb70c1188e --- diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S index 0c608597c..7cdde552b 100644 --- a/bl31/aarch64/runtime_exceptions.S +++ b/bl31/aarch64/runtime_exceptions.S @@ -39,6 +39,14 @@ .globl fiq_aarch32 .globl serror_aarch32 + /* + * Save LR and make x30 available as most of the routines in vector entry + * need a free register + */ + .macro save_x30 + str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] + .endm + /* * Macro that prepares entry to EL3 upon taking an exception. * @@ -58,12 +66,6 @@ /* Unmask the SError interrupt */ msr daifclr, #DAIF_ABT_BIT - /* - * Explicitly save x30 so as to free up a register and to enable - * branching - */ - str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] - /* Check for SErrors synchronized by the ESB instruction */ mrs x30, DISR_EL1 tbz x30, #DISR_A_BIT, 1f @@ -108,11 +110,7 @@ /* Use ISB for the above unmask operation to take effect immediately */ isb - /* - * Refer Note 1. - * No need to restore X30 as macros following this modify x30 anyway. - */ - str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] + /* Refer Note 1. */ mov x30, #1 str x30, [sp, #CTX_EL3STATE_OFFSET + CTX_IS_IN_EL3] dmb sy @@ -316,7 +314,7 @@ vector_entry serror_sp_elx * triggered due to explicit synchronization in EL3. Refer Note 1. */ /* Assumes SP_EL3 on entry */ - str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] + save_x30 ldr x30, [sp, #CTX_EL3STATE_OFFSET + CTX_IS_IN_EL3] cbnz x30, 1f @@ -338,24 +336,28 @@ vector_entry sync_exception_aarch64 * to a valid cpu context where the general purpose and system register * state can be saved. */ + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_sync_exception end_vector_entry sync_exception_aarch64 vector_entry irq_aarch64 + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_interrupt_exception irq_aarch64 end_vector_entry irq_aarch64 vector_entry fiq_aarch64 + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_interrupt_exception fiq_aarch64 end_vector_entry fiq_aarch64 vector_entry serror_aarch64 + save_x30 apply_at_speculative_wa #if RAS_EXTENSION msr daifclr, #DAIF_ABT_BIT @@ -377,24 +379,28 @@ vector_entry sync_exception_aarch32 * to a valid cpu context where the general purpose and system register * state can be saved. */ + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_sync_exception end_vector_entry sync_exception_aarch32 vector_entry irq_aarch32 + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_interrupt_exception irq_aarch32 end_vector_entry irq_aarch32 vector_entry fiq_aarch32 + save_x30 apply_at_speculative_wa check_and_unmask_ea handle_interrupt_exception fiq_aarch32 end_vector_entry fiq_aarch32 vector_entry serror_aarch32 + save_x30 apply_at_speculative_wa #if RAS_EXTENSION msr daifclr, #DAIF_ABT_BIT diff --git a/include/arch/aarch64/el2_common_macros.S b/include/arch/aarch64/el2_common_macros.S index 7bf480698..b3b85e67e 100644 --- a/include/arch/aarch64/el2_common_macros.S +++ b/include/arch/aarch64/el2_common_macros.S @@ -384,13 +384,12 @@ .macro apply_at_speculative_wa #if ERRATA_SPECULATIVE_AT /* - * Explicitly save x30 so as to free up a register and to enable - * branching and also, save x29 which will be used in the called - * function + * This function expects x30 has been saved. + * Also, save x29 which will be used in the called function. */ - stp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] + str x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] bl save_and_update_ptw_el1_sys_regs - ldp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] + ldr x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] #endif .endm diff --git a/include/arch/aarch64/el3_common_macros.S b/include/arch/aarch64/el3_common_macros.S index de2b931af..40ff05668 100644 --- a/include/arch/aarch64/el3_common_macros.S +++ b/include/arch/aarch64/el3_common_macros.S @@ -532,13 +532,12 @@ .macro apply_at_speculative_wa #if ERRATA_SPECULATIVE_AT /* - * Explicitly save x30 so as to free up a register and to enable - * branching and also, save x29 which will be used in the called - * function + * This function expects x30 has been saved. + * Also, save x29 which will be used in the called function. */ - stp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] + str x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] bl save_and_update_ptw_el1_sys_regs - ldp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] + ldr x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29] #endif .endm