From: Xiaodong Yan <Xiaodong.Yan@amd.com>
Date: Tue, 28 Jul 2020 10:12:45 +0000 (+0800)
Subject: drm/amd/display: mpcc black color should not be impacted by pixel encoding format
X-Git-Tag: baikal/mips/sdk5.9~12478^2~23^2~173
X-Git-Url: https://git.baikalelectronics.ru/sdk/?a=commitdiff_plain;h=b26e216408fab26c343cefab9a714954002ed5a1;p=kernel.git

drm/amd/display: mpcc black color should not be impacted by pixel encoding format

[Why]
The format in MPCC should be 444

[How]
do not modify the mpcc black color according to pixel encoding format

Signed-off-by: Xiaodong Yan <Xiaodong.Yan@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index a643927e272bd..57cd527896062 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2368,14 +2368,6 @@ void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
 				&blnd_cfg.black_color);
 	}
 
-	/*
-	 * The way 420 is packed, 2 channels carry Y component, 1 channel
-	 * alternate between Cb and Cr, so both channels need the pixel
-	 * value for Y
-	 */
-	if (pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)
-		blnd_cfg.black_color.color_r_cr = blnd_cfg.black_color.color_g_y;
-
 	if (per_pixel_alpha)
 		blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA;
 	else