From: Marek Vasut <marex@denx.de>
Date: Mon, 13 Jun 2022 12:35:25 +0000 (+0200)
Subject: spi: nxp_fspi: Fix clock imbalance
X-Git-Tag: baikal/mips/sdk5.9~3^2~24^2
X-Git-Url: https://git.baikalelectronics.ru/sdk/?a=commitdiff_plain;h=7d30f4682bd5da7d23b00397677c5faee19695e3;p=uboot.git

spi: nxp_fspi: Fix clock imbalance

The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(),
where the IP clock are initially disabled. Drop the second disabling of
clock to prevent clock enable/disable imbalance reported by clock core:

"
clk qspi_root_clk already disabled
"

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---

diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c
index 607c953987..579d6bac9b 100644
--- a/drivers/spi/nxp_fspi.c
+++ b/drivers/spi/nxp_fspi.c
@@ -866,9 +866,6 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
 	u32 reg;
 
 #if CONFIG_IS_ENABLED(CLK)
-	/* disable and unprepare clock to avoid glitch pass to controller */
-	nxp_fspi_clk_disable_unprep(f);
-
 	/* the default frequency, we will change it later if necessary. */
 	ret = clk_set_rate(&f->clk, 20000000);
 	if (ret < 0)