From: Tom Rini Date: Mon, 27 Jun 2022 17:35:46 +0000 (-0400) Subject: Convert CONFIG_SYS_CACHE_STASHING to Kconfig X-Git-Tag: baikal/mips/sdk5.8.2~5^2~292^2^2~5 X-Git-Url: https://git.baikalelectronics.ru/sdk/?a=commitdiff_plain;h=7cae59fbd25fb40c358d8fb0ca195a25d9d87380;p=uboot.git Convert CONFIG_SYS_CACHE_STASHING to Kconfig This converts the following to Kconfig: CONFIG_SYS_CACHE_STASHING Signed-off-by: Tom Rini --- diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 915e28e110..b6881bf1ff 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1230,6 +1230,9 @@ config SYS_CPC_REINIT_F config SYS_FSL_CPC bool "Corenet Platform Cache support" +config SYS_CACHE_STASHING + bool "Enable cache stashing" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 4c453a7cd9..30bf78be1e 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index b5f920b013..d5ad60981a 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index ecf63e59c6..97b01b498b 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e609dfcbf2..c1eb080532 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 59fdc33ad4..1df522a744 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 17aa980518..2380cfc771 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 2be600a584..8a2464df91 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index f22719558f..0abf6e1631 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 2aba222894..66769e03c7 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 9bfb0a88f1..8b5b81448a 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 1d5f00d1c8..a0b12d049e 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 741adc5162..f48b0f92f7 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index c10c94849e..bf7287417e 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 111ca1d487..c3a5f630a9 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index fd94afa762..9dac9e94c6 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index d44f062558..de2b09c18f 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index fdff32c2d2..3a3cff873b 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index fdfbdd2ec0..9499f585f1 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 9f1599fb63..da28ef143f 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index aca69b3216..e51e363cfd 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index fcf530d44f..e86f0fa99a 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 3e0239edf3..c8d8857ccb 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 3063157a7f..1f3d6f6985 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 0a83ed19b1..f947561960 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 2f12b4e609..d83d365423 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 2fc4e16cfe..a18ea56516 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 7adf3af6b8..160e697159 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 2228c64d10..16563ea8af 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index fbfbab84a1..e7775dac0b 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index b84d653d49..472e5779af 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 21f76bd4b0..6882baf164 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index bcc60b7ade..5b1824ddb9 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 8df5b3db29..6c6835eee3 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index a8e020ae68..a34c7caec7 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 3baf69a088..0f503a889c 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 9d8feac9ec..d5845febd8 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index e4eaa75d30..e599c4e640 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index a2062b4b3d..bd467ac7cf 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index c3216474c3..5b7849ea6b 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index ee900f5d9c..a0c92441ce 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 64f4c244fa..2d552835b7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -45,7 +45,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3df6ec6246..c90ffe048c 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -95,7 +95,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 8503fd1087..56486cf5c9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -63,7 +63,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e981f621c3..710254a8fb 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -68,7 +68,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 48cdc75a08..8ade2e3c82 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -63,7 +63,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index c31b0b6841..653483cc99 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -44,7 +44,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index f20f4e35e9..4eeca47c25 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -38,7 +38,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 3f22ddc6dd..b389229b75 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -146,7 +146,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E /* POST memory regions test */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0a2b8179d4..000ec0945f 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -495,7 +495,6 @@ CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR -CONFIG_SYS_CACHE_STASHING CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH