From: Jonas Karlman Date: Tue, 14 Mar 2023 00:38:27 +0000 (+0000) Subject: clk: rockchip: rk3588: Fix clk_aux16m in clock driver X-Git-Tag: baikal/mips/sdk5.8.2~5^2~18^2~10 X-Git-Url: https://git.baikalelectronics.ru/sdk/?a=commitdiff_plain;h=413723bf5cb1257f8d084c10f1a38cecbbeac2ae;p=uboot.git clk: rockchip: rk3588: Fix clk_aux16m in clock driver The rate and error value is not returned for aux16m clocks, fix this. Fixes: 9101bccc6bee ("clk: rockchip: Add rk3588 clk support") Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 5271d94348..a7df553e87 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1558,7 +1558,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk) #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1: - rk3588_aux16m_get_clk(priv, clk->id); + rate = rk3588_aux16m_get_clk(priv, clk->id); break; case ACLK_VOP_ROOT: case ACLK_VOP: @@ -1707,7 +1707,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1: - rk3588_aux16m_set_clk(priv, clk->id, rate); + ret = rk3588_aux16m_set_clk(priv, clk->id, rate); break; case ACLK_VOP_ROOT: case ACLK_VOP: