]> git.baikalelectronics.ru Git - kernel.git/commitdiff
spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
authorClark Wang <xiaoning.wang@nxp.com>
Mon, 27 Jul 2020 03:14:48 +0000 (11:14 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 29 Jul 2020 13:40:54 +0000 (14:40 +0100)
SPI common code does not support using CS discontinuously for now.
However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag
is_only_cs1 to set the correct TCR[PCS].

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031448.31661-4-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-fsl-lpspi.c

index 1e426884ac374006aeb28811ca0a00e031c6e597..85a5c952389a8aad065b7e475d624ca126684c96 100644 (file)
@@ -98,6 +98,7 @@ struct fsl_lpspi_data {
        struct clk *clk_ipg;
        struct clk *clk_per;
        bool is_slave;
+       bool is_only_cs1;
        bool is_first_byte;
 
        void *rx_buf;
@@ -257,10 +258,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
 
        temp |= fsl_lpspi->config.bpw - 1;
        temp |= (fsl_lpspi->config.mode & 0x3) << 30;
+       temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
        if (!fsl_lpspi->is_slave) {
                temp |= fsl_lpspi->config.prescale << 27;
-               temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
-
                /*
                 * Set TCR_CONT will keep SS asserted after current transfer.
                 * For the first transfer, clear TCR_CONTC to assert SS.
@@ -421,7 +421,10 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
        fsl_lpspi->config.mode = spi->mode;
        fsl_lpspi->config.bpw = t->bits_per_word;
        fsl_lpspi->config.speed_hz = t->speed_hz;
-       fsl_lpspi->config.chip_select = spi->chip_select;
+       if (fsl_lpspi->is_only_cs1)
+               fsl_lpspi->config.chip_select = 1;
+       else
+               fsl_lpspi->config.chip_select = spi->chip_select;
 
        if (!fsl_lpspi->config.speed_hz)
                fsl_lpspi->config.speed_hz = spi->max_speed_hz;
@@ -835,6 +838,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
        fsl_lpspi = spi_controller_get_devdata(controller);
        fsl_lpspi->dev = &pdev->dev;
        fsl_lpspi->is_slave = is_slave;
+       fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
+                                               "fsl,spi-only-use-cs1-sel");
 
        controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
        controller->transfer_one = fsl_lpspi_transfer_one;