riscv: Do some basic architecture level cpu initialization

In arch_cpu_init_dm() do some basic architecture level cpu
initialization, like FPU enable, etc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index fc7c9b37516f1b13be505d8c95558deeb9241637..e662140427a563caaef8c1ffe5c2e710db4811ca 100644 (file)
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <log.h>
 #include <asm/csr.h>
+#include <asm/encoding.h>
 #include <dm/uclass-internal.h>
 
 /*
@@ -61,7 +62,31 @@ static int riscv_cpu_probe(void)
 
 int arch_cpu_init_dm(void)
 {
-       return riscv_cpu_probe();
+       int ret;
+
+       ret = riscv_cpu_probe();
+       if (ret)
+               return ret;
+
+       /* Enable FPU */
+       if (supports_extension('d') || supports_extension('f')) {
+               csr_set(MODE_PREFIX(status), MSTATUS_FS);
+               csr_write(fcsr, 0);
+       }
+
+       if (CONFIG_IS_ENABLED(RISCV_MMODE)) {
+               /*
+                * Enable perf counters for cycle, time,
+                * and instret counters only
+                */
+               csr_write(mcounteren, GENMASK(2, 0));
+
+               /* Disable paging */
+               if (supports_extension('s'))
+                       csr_write(satp, 0);
+       }
+
+       return 0;
 }
 
 int arch_early_init_r(void)