#size-cells = <1>;
compatible = "mti,sead-3";
model = "MIPS SEAD-3";
- interrupt-parent = <&gic>;
chosen {
stdout-path = "serial1:115200";
compatible = "generic-ehci";
reg = <0x1b200000 0x1000>;
+ interrupt-parent = <&gic>;
interrupts = <0>; /* GIC 0 or CPU 6 */
has-transaction-translator;
clock-frequency = <14745600>;
+ interrupt-parent = <&gic>;
interrupts = <3>; /* GIC 3 or CPU 4 */
no-loopback-test;
clock-frequency = <14745600>;
+ interrupt-parent = <&gic>;
interrupts = <2>; /* GIC 2 or CPU 4 */
no-loopback-test;
reg = <0x1f010000 0x10000>;
reg-io-width = <4>;
+ interrupt-parent = <&gic>;
interrupts = <0>; /* GIC 0 or CPU 6 */
phy-mode = "mii";
return -EINVAL;
}
- err = fdt_setprop_u32(fdt, 0, "interrupt-parent", cpu_phandle);
- if (err) {
- pr_err("unable to set root interrupt-parent: %d\n", err);
- return err;
- }
-
uart_off = fdt_node_offset_by_compatible(fdt, -1, "ns16550a");
while (uart_off >= 0) {
+ err = fdt_setprop_u32(fdt, uart_off, "interrupt-parent",
+ cpu_phandle);
+ if (err) {
+ pr_warn("unable to set UART interrupt-parent: %d\n",
+ err);
+ return err;
+ }
+
err = fdt_setprop_u32(fdt, uart_off, "interrupts",
cpu_uart_int);
if (err) {
return eth_off;
}
+ err = fdt_setprop_u32(fdt, eth_off, "interrupt-parent", cpu_phandle);
+ if (err) {
+ pr_err("unable to set ethernet interrupt-parent: %d\n", err);
+ return err;
+ }
+
err = fdt_setprop_u32(fdt, eth_off, "interrupts", cpu_eth_int);
if (err) {
pr_err("unable to set ethernet interrupts property: %d\n", err);
return ehci_off;
}
+ err = fdt_setprop_u32(fdt, ehci_off, "interrupt-parent", cpu_phandle);
+ if (err) {
+ pr_err("unable to set EHCI interrupt-parent: %d\n", err);
+ return err;
+ }
+
err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int);
if (err) {
pr_err("unable to set EHCI interrupts property: %d\n", err);