If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
select HAVE_ARCH_IOREMAP
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
+ select SPL_SEPARATE_BSS if SPL
config NDS32
bool "NDS32 architecture"
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
+ select SPL_SEPARATE_BSS if SPL
imply DM_SERIAL
imply DM_ETH
imply DM_EVENT
bool
select PHYS_64BIT
select SYS_CACHE_SHIFT_6
+ imply SPL_SEPARATE_BSS
config ARM64_CRC32
bool "Enable support for CRC32 instruction"
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
+ imply SPL_SEPARATE_BSS
config CPU_ARM946ES
bool
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
+ imply SPL_SEPARATE_BSS
config CPU_ARM1176
bool
bool "Marvell Orion"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select SPL_SEPARATE_BSS if SPL
config TARGET_STV0991
bool "Support stv0991"
imply TI_SYSC if DM && OF_CONTROL
imply FIT
imply DM_EVENT
+ imply SPL_SEPARATE_BSS
config ARCH_MESON
bool "Amlogic Meson"
select SYS_FSL_SEC_LE
imply MXC_GPIO
imply SYS_THUMB_BUILD
+ imply SPL_SEPARATE_BSS
if ARCH_MX6
config SPL_LDSCRIPT