riscv: implement IPI platform functions using SBI

The supervisor binary interface (SBI) provides the necessary functions
to implement the platform IPI functions riscv_send_ipi() and
riscv_clear_ipi(). Use it to implement them.

This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs
running in supervisor mode. Support for machine mode is already
available for CPUs that include the SiFive CLINT.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 4d7a1155695f97ae3e1ee9b841b11224f4ab071f..9da609b33b148dc2ac1e172d2a7c915d87c2777e 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -139,4 +139,9 @@ config NR_CPUS
          Stack memory is pre-allocated. U-Boot must therefore know the
          maximum number of CPUs that may be present.
 
+config SBI_IPI
+       bool
+       default y if RISCV_SMODE
+       depends on SMP
+
 endmenu

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 19370f974978dbac3089bd4cde833d95c2b93af8..35dbf643e46767c04ba8e2c50379ae1c4de2d610 100644 (file)
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_RISCV_RDTIME) += rdtime.o
 obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
 obj-y  += interrupts.o
 obj-y  += reset.o
+obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
 obj-y   += setjmp.o
 obj-$(CONFIG_SMP) += smp.o
 

diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c
new file mode 100644 (file)
index 0000000..170346d
--- /dev/null
+++ b/arch/riscv/lib/sbi_ipi.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Fraunhofer AISEC,
+ * Lukas Auer <lukas.auer@aisec.fraunhofer.de>
+ */
+
+#include <common.h>
+#include <asm/sbi.h>
+
+int riscv_send_ipi(int hart)
+{
+       ulong mask;
+
+       mask = 1UL << hart;
+       sbi_send_ipi(&mask);
+
+       return 0;
+}
+
+int riscv_clear_ipi(int hart)
+{
+       sbi_clear_ipi();
+
+       return 0;
+}