drm/rockchip: Clear interrupt status bits before enabling

The enable register only masks the raw status bits to signal CPU
interrupt only for enabled interrupts. The status bits are activated
regardless of the enable register. This means that we might have an old
interrupt event queued, which we are not interested in. To avoid getting
a spurious interrupt signalled, we have to clear the old bit before we
update the enable register.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index efb216005baad7808692752575ac2e8b0842fd2f..48fe554fa620cceabf66c25e7c5b7382895c91b6 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -414,6 +414,7 @@ static void vop_dsp_hold_valid_irq_enable(struct vop *vop)
 
        spin_lock_irqsave(&vop->irq_lock, flags);
 
+       VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1);
        VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1);
 
        spin_unlock_irqrestore(&vop->irq_lock, flags);
@@ -479,6 +480,7 @@ static void vop_line_flag_irq_enable(struct vop *vop, int line_num)
        spin_lock_irqsave(&vop->irq_lock, flags);
 
        VOP_CTRL_SET(vop, line_flag_num[0], line_num);
+       VOP_INTR_SET_TYPE(vop, clear, LINE_FLAG_INTR, 1);
        VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 1);
 
        spin_unlock_irqrestore(&vop->irq_lock, flags);
@@ -917,6 +919,7 @@ static int vop_crtc_enable_vblank(struct drm_crtc *crtc)
 
        spin_lock_irqsave(&vop->irq_lock, flags);
 
+       VOP_INTR_SET_TYPE(vop, clear, FS_INTR, 1);
        VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1);
 
        spin_unlock_irqrestore(&vop->irq_lock, flags);