return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 1);
}
+int mmc_boot_wp_single_partition(struct mmc *mmc, int partition)
+{
+ u8 value;
+ int ret;
+
+ value = EXT_CSD_BOOT_WP_B_PWR_WP_EN;
+
+ if (partition == 0) {
+ value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL;
+ ret = mmc_switch(mmc,
+ EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BOOT_WP,
+ value);
+ } else if (partition == 1) {
+ value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL;
+ value |= EXT_CSD_BOOT_WP_B_PWR_WP_SEC_SEL;
+ ret = mmc_switch(mmc,
+ EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BOOT_WP,
+ value);
+ } else {
+ ret = mmc_boot_wp(mmc);
+ }
+
+ return ret;
+}
+
#if !CONFIG_IS_ENABLED(MMC_TINY)
static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode,
bool hsdowngrade)
#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
+#define EXT_CSD_BOOT_WP_B_SEC_WP_SEL (0x80) /* enable partition selector */
+#define EXT_CSD_BOOT_WP_B_PWR_WP_SEC_SEL (0x02) /* partition selector to protect */
+#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01) /* power-on write-protect */
+
#define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
#define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
*/
int mmc_boot_wp(struct mmc *mmc);
+/**
+ * mmc_boot_wp_single_partition() - set write protection to a boot partition.
+ *
+ * This function sets a single boot partition to protect and leave the
+ * other partition writable.
+ *
+ * @param mmc the mmc device.
+ * @param partition 0 - first boot partition, 1 - second boot partition.
+ * @return 0 for success
+ */
+int mmc_boot_wp_single_partition(struct mmc *mmc, int partition);
+
static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
{
return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;