]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amdgpu: there is no vbios fb on devices with no display hw (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Nov 2022 17:50:38 +0000 (12:50 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 18:24:40 +0000 (13:24 -0500)
If we enable virtual display functionality on parts with
no display hardware we can end up trying to check for and
reserve the vbios FB area on devices where it doesn't exist.
Check if display hardware is actually present on the hardware
before trying to reserve the memory.

v2: move the check into common code

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

index 8639a4f9c6e8c232988fb75f7a0b2ed69d7fb6f3..2eca58220550eb9e10f2a42a64a0d5bfacbbbfcc 100644 (file)
@@ -1293,6 +1293,7 @@ void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
                                u32 reg, u32 v);
 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
                                            struct dma_fence *gang);
+bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
 
 /* atpx handler */
 #if defined(CONFIG_VGA_SWITCHEROO)
index 64510898eedd0609a3b62a68121a5ac883196fb6..f1e9663b4051075a78c2d72f5c85ca40e1050bfa 100644 (file)
@@ -6044,3 +6044,44 @@ struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
        dma_fence_put(old);
        return NULL;
 }
+
+bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev)
+{
+       switch (adev->asic_type) {
+#ifdef CONFIG_DRM_AMDGPU_SI
+       case CHIP_HAINAN:
+#endif
+       case CHIP_TOPAZ:
+               /* chips with no display hardware */
+               return false;
+#ifdef CONFIG_DRM_AMDGPU_SI
+       case CHIP_TAHITI:
+       case CHIP_PITCAIRN:
+       case CHIP_VERDE:
+       case CHIP_OLAND:
+#endif
+#ifdef CONFIG_DRM_AMDGPU_CIK
+       case CHIP_BONAIRE:
+       case CHIP_HAWAII:
+       case CHIP_KAVERI:
+       case CHIP_KABINI:
+       case CHIP_MULLINS:
+#endif
+       case CHIP_TONGA:
+       case CHIP_FIJI:
+       case CHIP_POLARIS10:
+       case CHIP_POLARIS11:
+       case CHIP_POLARIS12:
+       case CHIP_VEGAM:
+       case CHIP_CARRIZO:
+       case CHIP_STONEY:
+               /* chips with display hardware */
+               return true;
+       default:
+               /* IP discovery */
+               if (!adev->ip_versions[DCE_HWIP][0] ||
+                   (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK))
+                       return false;
+               return true;
+       }
+}
index 34233a74248c2ffe5087e78d472b908690c3fc01..b06cb0bb166c514c8b16b003acb7cfc3ce7ece7e 100644 (file)
@@ -656,7 +656,7 @@ void amdgpu_gmc_get_vbios_allocations(struct amdgpu_device *adev)
        }
 
        if (amdgpu_sriov_vf(adev) ||
-           !amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_DCE)) {
+           !amdgpu_device_has_display_hardware(adev)) {
                size = 0;
        } else {
                size = amdgpu_gmc_get_vbios_fb_size(adev);