feat(mt8188): add MT8188 SPM debug logs

Add debug logs for tracking the status of suspend and resume.

Change-Id: Id2d2ab06fadb3118ab66f816937e0dd6e43dbdc3
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>

diff --git a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_bus26m.c b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_bus26m.c
index 0b792ab1bc08362791cf4b0d5f387969188cf2f1..c8a2d4c37eecfd87b0521152249e9339e1f92dcc 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_bus26m.c
+++ b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_bus26m.c
@@ -53,6 +53,7 @@ static unsigned int bus26m_ext_opand2;
 static struct mt_irqremain *refer2remain_irq;
 
 static struct mt_spm_cond_tables cond_bus26m = {
+       .name = "bus26m",
        .table_cg = {
                0xFF5DD002,     /* MTCMOS1 */
                0x0000003C,     /* MTCMOS2 */
@@ -175,7 +176,7 @@ bool spm_is_valid_rc_bus26m(unsigned int cpu, int state_id)
                (IS_PLAT_SUSPEND_ID(state_id) || (state_id == MT_PLAT_PWR_STATE_SYSTEM_BUS)));
 }
 
-static int update_rc_condition(const void *val)
+static int update_rc_condition(int state_id, const void *val)
 {
        const struct mt_spm_cond_tables *tlb = (const struct mt_spm_cond_tables *)val;
        const struct mt_spm_cond_tables *tlb_check =
@@ -185,7 +186,7 @@ static int update_rc_condition(const void *val)
                return MT_RM_STATUS_BAD;
        }
 
-       status.is_cond_block = mt_spm_cond_check(tlb, tlb_check,
+       status.is_cond_block = mt_spm_cond_check(state_id, tlb, tlb_check,
                                                 (status.is_valid & MT_SPM_RC_VALID_COND_LATCH) ?
                                                 &cond_bus26m_res : NULL);
        status.all_pll_dump = mt_spm_dump_all_pll(tlb, tlb_check,
@@ -279,7 +280,7 @@ int spm_update_rc_bus26m(int state_id, int type, const void *val)
 
        switch (type) {
        case PLAT_RC_UPDATE_CONDITION:
-               res = update_rc_condition(val);
+               res = update_rc_condition(state_id, val);
                break;
        case PLAT_RC_UPDATE_REMAIN_IRQS:
                update_rc_remain_irqs(val);

diff --git a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_dram.c b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_dram.c
index d1a2435f66c055c4abd52ed1016bbcf9340fefae..82b38ade45078904e364b378407978cb55c60991 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_dram.c
+++ b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_dram.c
@@ -37,6 +37,7 @@
 #define CONSTRAINT_DRAM_RESOURCE_REQ (MT_SPM_SYSPLL | MT_SPM_INFRA | MT_SPM_26M)
 
 static struct mt_spm_cond_tables cond_dram = {
+       .name = "dram",
        .table_cg = {
                0xFF5DD002,     /* MTCMOS1 */
                0x0000003C,     /* MTCMOS2 */
@@ -104,7 +105,7 @@ bool spm_is_valid_rc_dram(unsigned int cpu, int state_id)
                 (state_id == MT_PLAT_PWR_STATE_SYSTEM_BUS)));
 }
 
-static int update_rc_condition(const void *val)
+static int update_rc_condition(int state_id, const void *val)
 {
        const struct mt_spm_cond_tables *tlb = (const struct mt_spm_cond_tables *)val;
        const struct mt_spm_cond_tables *tlb_check = (const struct mt_spm_cond_tables *)&cond_dram;
@@ -113,7 +114,7 @@ static int update_rc_condition(const void *val)
                return MT_RM_STATUS_BAD;
        }
 
-       status.is_cond_block = mt_spm_cond_check(tlb, tlb_check,
+       status.is_cond_block = mt_spm_cond_check(state_id, tlb, tlb_check,
                                                 (status.is_valid & MT_SPM_RC_VALID_COND_LATCH) ?
                                                  &cond_dram_res : NULL);
        return MT_RM_STATUS_OK;
@@ -185,7 +186,7 @@ int spm_update_rc_dram(int state_id, int type, const void *val)
 
        switch (type) {
        case PLAT_RC_UPDATE_CONDITION:
-               res = update_rc_condition(val);
+               res = update_rc_condition(state_id, val);
                break;
        case PLAT_RC_CLKBUF_STATUS:
                update_rc_clkbuf_status(val);

diff --git a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_syspll.c b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_syspll.c
index 700f500187a78056233e197ed6dc417a85050c49..5359c7c1b494aac1f2f25f0c333aa5a7e0831c2b 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_syspll.c
+++ b/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_syspll.c
@@ -49,6 +49,7 @@ static unsigned int syspll_ext_opand2;
 static unsigned short ext_status_syspll;
 
 static struct mt_spm_cond_tables cond_syspll = {
+       .name = "syspll",
        .table_cg = {
                0xFF5DD002,     /* MTCMOS1 */
                0x0000003C,     /* MTCMOS2 */
@@ -113,7 +114,7 @@ bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id)
                 (state_id == MT_PLAT_PWR_STATE_SYSTEM_BUS)));
 }
 
-static int update_rc_condition(const void *val)
+static int update_rc_condition(int state_id, const void *val)
 {
        int res = MT_RM_STATUS_OK;
 
@@ -126,7 +127,7 @@ static int update_rc_condition(const void *val)
                return MT_RM_STATUS_BAD;
        }
 
-       status.is_cond_block = mt_spm_cond_check(tlb, tlb_check,
+       status.is_cond_block = mt_spm_cond_check(state_id, tlb, tlb_check,
                                                 (status.is_valid & MT_SPM_RC_VALID_COND_LATCH) ?
                                                 &cond_syspll_res : NULL);
        return res;
@@ -228,7 +229,7 @@ int spm_update_rc_syspll(int state_id, int type, const void *val)
 
        switch (type) {
        case PLAT_RC_UPDATE_CONDITION:
-               res = update_rc_condition(val);
+               res = update_rc_condition(state_id, val);
                break;
        case PLAT_RC_CLKBUF_STATUS:
                update_rc_clkbuf_status(val);

diff --git a/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.c b/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.c
index fe6e598287b9308d53ef7e388bcb76518cdf1411..bed55c906d3359401e4db78f5eee0da7db276c98 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.c
+++ b/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.c
@@ -126,12 +126,14 @@ static struct idle_cond_info idle_cg_info[PLAT_SPM_COND_MAX] = {
 #define PLL_APLL4      MT_LP_TZ_APMIXEDSYS(0x404)
 #define PLL_APLL5      MT_LP_TZ_APMIXEDSYS(0x418)
 
-unsigned int mt_spm_cond_check(const struct mt_spm_cond_tables *src,
+unsigned int mt_spm_cond_check(int state_id,
+                              const struct mt_spm_cond_tables *src,
                               const struct mt_spm_cond_tables *dest,
                               struct mt_spm_cond_tables *res)
 {
        unsigned int b_res = 0U;
        unsigned int i;
+       bool is_system_suspend = IS_PLAT_SUSPEND_ID(state_id);
 
        if ((src == NULL) || (dest == NULL)) {
                return SPM_COND_CHECK_FAIL;
@@ -140,6 +142,11 @@ unsigned int mt_spm_cond_check(const struct mt_spm_cond_tables *src,
        for (i = 0; i < PLAT_SPM_COND_MAX; i++) {
                if (res != NULL) {
                        res->table_cg[i] = (src->table_cg[i] & dest->table_cg[i]);
+                       if (is_system_suspend && ((res->table_cg[i]) != 0U)) {
+                               INFO("suspend: %s block[%u](0x%lx) = 0x%08x\n",
+                                    dest->name, i, idle_cg_info[i].addr,
+                                    res->table_cg[i]);
+                       }
 
                        if ((res->table_cg[i]) != 0U) {
                                b_res |= BIT(i);
@@ -161,6 +168,10 @@ unsigned int mt_spm_cond_check(const struct mt_spm_cond_tables *src,
                b_res |= SPM_COND_CHECK_BLOCKED_PLL;
        }
 
+       if (is_system_suspend && ((b_res) != 0U)) {
+               INFO("suspend: %s total blocked = 0x%08x\n", dest->name, b_res);
+       }
+
        return b_res;
 }
 

diff --git a/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.h b/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.h
index 793d5e81cd3151988b083ae9dfa3c6bdf109ab0a..d93df57eba7670c4f8d460ad4ab715406318a214 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.h
+++ b/plat/mediatek/drivers/spm/mt8188/mt_spm_cond.h
@@ -75,13 +75,15 @@ enum plat_spm_cond_pll {
 #define SPM_COND_CHECK_FAIL            BIT(31)
 
 struct mt_spm_cond_tables {
+       char *name;
        unsigned int table_cg[PLAT_SPM_COND_MAX];
        unsigned int table_pll;
        unsigned int table_all_pll;
        void *priv;
 };
 
-unsigned int mt_spm_cond_check(const struct mt_spm_cond_tables *src,
+unsigned int mt_spm_cond_check(int state_id,
+                              const struct mt_spm_cond_tables *src,
                               const struct mt_spm_cond_tables *dest,
                               struct mt_spm_cond_tables *res);
 unsigned int mt_spm_dump_all_pll(const struct mt_spm_cond_tables *src,

diff --git a/plat/mediatek/drivers/spm/mt8188/mt_spm_conservation.c b/plat/mediatek/drivers/spm/mt8188/mt_spm_conservation.c
index bcb2df64b6880be7b8f6d27d66dd936852e630b1..395448a9fee70a00f2ed2fca013f8dbc7463b985 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/mt_spm_conservation.c
+++ b/plat/mediatek/drivers/spm/mt8188/mt_spm_conservation.c
@@ -61,6 +61,14 @@ static int go_to_spm_before_wfi(int state_id, unsigned int ext_opand,
 
        __spm_send_cpu_wakeup_event();
 
+       INFO("cpu%d: wakesrc = 0x%x, settle = 0x%x, sec = %u\n",
+            cpu, pwrctrl->wake_src, mmio_read_32(SPM_CLK_SETTLE),
+            (mmio_read_32(PCM_TIMER_VAL) / 32768));
+       INFO("sw_flag = 0x%x 0x%x, req = 0x%x, pwr = 0x%x 0x%x\n",
+            pwrctrl->pcm_flags, pwrctrl->pcm_flags1,
+            mmio_read_32(SPM_SRC_REQ), mmio_read_32(PWR_STATUS),
+            mmio_read_32(PWR_STATUS_2ND));
+
        return ret;
 }
 

diff --git a/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.c b/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.c
index b38a6d0a7fb056afbf71b97f499f6c4e2b06ad33..5eb16b35ab905d67dd4c2578703c939f6d61e6bf 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.c
+++ b/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.c
@@ -24,6 +24,7 @@
 
 wake_reason_t __spm_output_wake_reason(const struct wake_status *wakesta)
 {
+       uint32_t bk_vtcxo_dur, spm_26m_off_pct;
        wake_reason_t wr = WR_UNKNOWN;
 
        if (wakesta == NULL) {
@@ -46,6 +47,33 @@ wake_reason_t __spm_output_wake_reason(const struct wake_status *wakesta)
                }
        }
 
+       INFO("r12 = 0x%x, r12_ext = 0x%x, r13 = 0x%x, debug_flag = 0x%x 0x%x\n",
+            wakesta->tr.comm.r12, wakesta->r12_ext, wakesta->tr.comm.r13, wakesta->tr.comm.debug_flag,
+            wakesta->tr.comm.debug_flag1);
+       INFO("raw_sta = 0x%x 0x%x 0x%x, idle_sta = 0x%x, cg_check_sta = 0x%x\n",
+            wakesta->tr.comm.raw_sta, wakesta->md32pcm_wakeup_sta,
+            wakesta->md32pcm_event_sta, wakesta->idle_sta,
+            wakesta->cg_check_sta);
+       INFO("req_sta = 0x%x 0x%x 0x%x 0x%x 0x%x, isr = 0x%x\n",
+            wakesta->tr.comm.req_sta0, wakesta->tr.comm.req_sta1, wakesta->tr.comm.req_sta2,
+            wakesta->tr.comm.req_sta3, wakesta->tr.comm.req_sta4, wakesta->isr);
+       INFO("rt_req_sta0 = 0x%x, rt_req_sta1 = 0x%x, rt_req_sta2 = 0x%x\n",
+            wakesta->rt_req_sta0, wakesta->rt_req_sta1, wakesta->rt_req_sta2);
+       INFO("rt_req_sta3 = 0x%x, dram_sw_con_3 = 0x%x, raw_ext_sta = 0x%x\n",
+            wakesta->rt_req_sta3, wakesta->rt_req_sta4, wakesta->raw_ext_sta);
+       INFO("wake_misc = 0x%x, pcm_flag = 0x%x 0x%x 0x%x 0x%x, req = 0x%x\n",
+            wakesta->wake_misc, wakesta->sw_flag0, wakesta->sw_flag1,
+            wakesta->tr.comm.b_sw_flag0, wakesta->tr.comm.b_sw_flag1, wakesta->src_req);
+       INFO("clk_settle = 0x%x, wlk_cntcv_l = 0x%x, wlk_cntcv_h = 0x%x\n",
+            wakesta->clk_settle, mmio_read_32(SYS_TIMER_VALUE_L),
+            mmio_read_32(SYS_TIMER_VALUE_H));
+
+       if (wakesta->tr.comm.timer_out != 0U) {
+               bk_vtcxo_dur = mmio_read_32(SPM_BK_VTCXO_DUR);
+               spm_26m_off_pct = (100 * bk_vtcxo_dur) / wakesta->tr.comm.timer_out;
+               INFO("spm_26m_off_pct = %u\n", spm_26m_off_pct);
+       }
+
        return wr;
 }
 
@@ -331,6 +359,18 @@ void __spm_get_wakeup_status(struct wake_status *wakesta, unsigned int ext_statu
        wakesta->tr.comm.b_sw_flag0 = mmio_read_32(SPM_SW_RSV_7);       /* SPM_SW_RSV_7 */
        wakesta->tr.comm.b_sw_flag1 = mmio_read_32(SPM_SW_RSV_8);       /* SPM_SW_RSV_8 */
 
+       /* record below spm info for debug */
+       wakesta->src_req = mmio_read_32(SPM_SRC_REQ);
+
+       /* get HW CG check status */
+       wakesta->cg_check_sta = mmio_read_32(SPM_CG_CHECK_STA);
+
+       wakesta->rt_req_sta0 = mmio_read_32(SPM_SW_RSV_2);
+       wakesta->rt_req_sta1 = mmio_read_32(SPM_SW_RSV_3);
+       wakesta->rt_req_sta2 = mmio_read_32(SPM_SW_RSV_4);
+       wakesta->rt_req_sta3 = mmio_read_32(SPM_SW_RSV_5);
+       wakesta->rt_req_sta4 = mmio_read_32(SPM_SW_RSV_6);
+
        /* get ISR status */
        wakesta->isr = mmio_read_32(SPM_IRQ_STA);
 
@@ -338,6 +378,9 @@ void __spm_get_wakeup_status(struct wake_status *wakesta, unsigned int ext_statu
        wakesta->sw_flag0 = mmio_read_32(SPM_SW_FLAG_0);
        wakesta->sw_flag1 = mmio_read_32(SPM_SW_FLAG_1);
 
+       /* get CLK SETTLE */
+       wakesta->clk_settle = mmio_read_32(SPM_CLK_SETTLE);
+
        /* check abort */
        wakesta->is_abort = wakesta->tr.comm.debug_flag & DEBUG_ABORT_MASK;
        wakesta->is_abort |= wakesta->tr.comm.debug_flag1 & DEBUG_ABORT_MASK_1;

diff --git a/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.h b/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.h
index c719cafcb8f0405bd2d2e55bb381e4790d053a9a..5e3390f297f91f98a04aa3ccc0ba9a4538aad030 100644 (file)
--- a/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.h
+++ b/plat/mediatek/drivers/spm/mt8188/mt_spm_internal.h
@@ -628,11 +628,19 @@ struct wake_status {
        uint32_t md32pcm_event_sta;     /* MD32PCM_EVENT_STA */
        uint32_t wake_misc;             /* SPM_SW_RSV_5 */
        uint32_t idle_sta;              /* SUBSYS_IDLE_STA */
+       uint32_t cg_check_sta;          /* SPM_CG_CHECK_STA */
        uint32_t sw_flag0;              /* SPM_SW_FLAG_0 */
        uint32_t sw_flag1;              /* SPM_SW_FLAG_1 */
        uint32_t isr;                   /* SPM_IRQ_STA */
+       uint32_t clk_settle;            /* SPM_CLK_SETTLE */
+       uint32_t src_req;               /* SPM_SRC_REQ */
        uint32_t log_index;
        uint32_t is_abort;
+       uint32_t rt_req_sta0;           /* SPM_SW_RSV_2 */
+       uint32_t rt_req_sta1;           /* SPM_SW_RSV_3 */
+       uint32_t rt_req_sta2;           /* SPM_SW_RSV_4 */
+       uint32_t rt_req_sta3;           /* SPM_SW_RSV_5 */
+       uint32_t rt_req_sta4;           /* SPM_SW_RSV_6 */
 };
 
 struct spm_lp_scen {