PCI: tegra194: Clear bandwidth management status

In the event of a bandwidth management interrupt, clear the bandwidth
management status in the configuration space also along with clearing
corresponding status in the application logic register to avoid slew
of interrupts.

Link: https://lore.kernel.org/r/20220721142052.25971-12-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 23377425952aa6a8852ce7d42fb743eae07506ac..5f1798d37572a3644e3f264118bd3688d5029f04 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -370,6 +370,12 @@ static irqreturn_t tegra_pcie_rp_irq_handler(int irq, void *arg)
                        apply_bad_link_workaround(pp);
                }
                if (status_l1 & APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS) {
+                       val_w = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
+                                                 PCI_EXP_LNKSTA);
+                       val_w |= PCI_EXP_LNKSTA_LBMS;
+                       dw_pcie_writew_dbi(pci, pcie->pcie_cap_base +
+                                          PCI_EXP_LNKSTA, val_w);
+
                        appl_writel(pcie,
                                    APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS,
                                    APPL_INTR_STATUS_L1_8_0);