net: ethernet: stmmac: Enable interface clocks on probe for IPQ806x

The ipq806x_gmac_probe() function enables the PTP clock but not the
appropriate interface clocks. This means that if the bootloader hasn't
done so attempting to bring up the interface will fail with an error
like:

[   59.028131] ipq806x-gmac-dwmac 37600000.ethernet: Failed to reset the dma
[   59.028196] ipq806x-gmac-dwmac 37600000.ethernet eth1: stmmac_hw_setup: DMA engine initialization failed
[   59.034056] ipq806x-gmac-dwmac 37600000.ethernet eth1: stmmac_open: Hw setup failed

This patch, a slightly cleaned up version of one posted by Sergey
Sergeev in:

https://forum.openwrt.org/t/support-for-mikrotik-rb3011uias-rm/4064/257

correctly enables the clock; we have already configured the source just
before this.

Tested on a MikroTik RB3011.

Signed-off-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
index 6ae13dc195105571e9ac572fc268d103ef9b8f09..02102c781a8cf4d786cf6b3f12981c63ddcc1f93 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
@@ -319,6 +319,19 @@ static int ipq806x_gmac_probe(struct platform_device *pdev)
        /* Enable PTP clock */
        regmap_read(gmac->nss_common, NSS_COMMON_CLK_GATE, &val);
        val |= NSS_COMMON_CLK_GATE_PTP_EN(gmac->id);
+       switch (gmac->phy_mode) {
+       case PHY_INTERFACE_MODE_RGMII:
+               val |= NSS_COMMON_CLK_GATE_RGMII_RX_EN(gmac->id) |
+                       NSS_COMMON_CLK_GATE_RGMII_TX_EN(gmac->id);
+               break;
+       case PHY_INTERFACE_MODE_SGMII:
+               val |= NSS_COMMON_CLK_GATE_GMII_RX_EN(gmac->id) |
+                               NSS_COMMON_CLK_GATE_GMII_TX_EN(gmac->id);
+               break;
+       default:
+               /* We don't get here; the switch above will have errored out */
+               unreachable();
+       }
        regmap_write(gmac->nss_common, NSS_COMMON_CLK_GATE, val);
 
        if (gmac->phy_mode == PHY_INTERFACE_MODE_SGMII) {