net/mlx5: Remove not used MLX5_CAP_BITS_RW_MASK

Remove not used MLX5_CAP_BITS_RW_MASK.
While at it, remove CAP_MASK, MLX5_CAP_OFF_CMDIF_CSUM
and MLX5_DEV_CAP_FLAG_*, since MLX5_CAP_BITS_RW_MASK
was their only user.

Signed-off-by: Shay Drory <shayd@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index c9b4e50a593ed6f2592ed40701d0d3b2fb5c0e1f..2078d9f03a5fada07b1f6bbdd011109c6c980773 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -314,13 +314,6 @@ struct mlx5_reg_host_endianness {
        u8      rsvd[15];
 };
 
-#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos))
-
-enum {
-       MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) |
-                               MLX5_DEV_CAP_FLAG_DCT,
-};
-
 static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size)
 {
        switch (size) {

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 15ac02eeed4fb82d0f53f9032b0d05123ce1a9f6..95a4fa0fd40a8ac55c7d9de69b6a4f9b1a59305a 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -386,21 +386,6 @@ enum {
        MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG   = 9,
 };
 
-enum {
-       MLX5_DEV_CAP_FLAG_XRC           = 1LL <<  3,
-       MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL <<  8,
-       MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL <<  9,
-       MLX5_DEV_CAP_FLAG_APM           = 1LL << 17,
-       MLX5_DEV_CAP_FLAG_ATOMIC        = 1LL << 18,
-       MLX5_DEV_CAP_FLAG_BLOCK_MCAST   = 1LL << 23,
-       MLX5_DEV_CAP_FLAG_ON_DMND_PG    = 1LL << 24,
-       MLX5_DEV_CAP_FLAG_CQ_MODER      = 1LL << 29,
-       MLX5_DEV_CAP_FLAG_RESIZE_CQ     = 1LL << 30,
-       MLX5_DEV_CAP_FLAG_DCT           = 1LL << 37,
-       MLX5_DEV_CAP_FLAG_SIG_HAND_OVER = 1LL << 40,
-       MLX5_DEV_CAP_FLAG_CMDIF_CSUM    = 3LL << 46,
-};
-
 enum {
        MLX5_ROCE_VERSION_1             = 0,
        MLX5_ROCE_VERSION_2             = 2,
@@ -496,10 +481,6 @@ enum {
        MLX5_MAX_PAGE_SHIFT             = 31
 };
 
-enum {
-       MLX5_CAP_OFF_CMDIF_CSUM         = 46,
-};
-
 enum {
        /*
         * Max wqe size for rdma read is 512 bytes, so this