BL31_SOURCES += lib/extensions/mpam/mpam.c
endif
-ifeq (${ENABLE_TRBE_FOR_NS},1)
+ifneq (${ENABLE_TRBE_FOR_NS},0)
BL31_SOURCES += lib/extensions/trbe/trbe.c
endif
#endif
}
-/******************************************************
- * Feature : FEAT_TRBE (Trace Buffer Extension)
- *****************************************************/
-static void read_feat_trbe(void)
-{
-#if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS)
- feat_detect_panic(is_feat_trbe_present(), "TRBE");
-#endif
-}
-
/******************************************************************
* Feature : FEAT_RNG_TRAP (Trapping support for RNDR/RNDRRS)
*****************************************************************/
/* v9.0 features */
read_feat_brbe();
- read_feat_trbe();
+ check_feature(ENABLE_TRBE_FOR_NS, read_feat_trbe_id_field(),
+ "TRBE", 1, 1);
/* v9.2 features */
read_feat_rme();
/*******************************************************************************
* Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
******************************************************************************/
-static inline bool is_feat_trbe_present(void)
+static inline unsigned int read_feat_trbe_id_field(void)
{
- return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEBUFFER_SHIFT) &
- ID_AA64DFR0_TRACEBUFFER_MASK) == ID_AA64DFR0_TRACEBUFFER_SUPPORTED);
+ return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
}
+static inline bool is_feat_trbe_supported(void)
+{
+ if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
+ return false;
+ }
+
+ if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
+ return true;
+ }
+
+ return read_feat_trbe_id_field() != 0U;
+
+}
#endif /* ARCH_FEATURES_H */
mpam_enable(el2_unused);
#endif
-#if ENABLE_TRBE_FOR_NS
- trbe_enable();
-#endif /* ENABLE_TRBE_FOR_NS */
+ if (is_feat_trbe_supported()) {
+ trbe_enable();
+ }
#if ENABLE_BRBE_FOR_NS
brbe_enable();
{
uint64_t val;
- if (is_feat_trbe_present()) {
- /*
- * MDCR_EL3.NSTB = 0b11
- * Allow access of trace buffer control registers from NS-EL1
- * and NS-EL2, tracing is prohibited in Secure and Realm state
- * (if implemented).
- */
- val = read_mdcr_el3();
- val |= MDCR_NSTB(MDCR_NSTB_EL1);
- write_mdcr_el3(val);
- }
+ /*
+ * MDCR_EL3.NSTB = 0b11
+ * Allow access of trace buffer control registers from NS-EL1
+ * and NS-EL2, tracing is prohibited in Secure and Realm state
+ * (if implemented).
+ */
+ val = read_mdcr_el3();
+ val |= MDCR_NSTB(MDCR_NSTB_EL1);
+ write_mdcr_el3(val);
}
static void *trbe_drain_trace_buffers_hook(const void *arg __unused)
{
- if (is_feat_trbe_present()) {
+ if (is_feat_trbe_supported()) {
/*
* Before switching from normal world to secure world
* the trace buffers need to be drained out to memory. This is
endif
# enable trace buffer control registers access to NS by default
-ENABLE_TRBE_FOR_NS := 1
+ENABLE_TRBE_FOR_NS := 2
# enable branch record buffer control registers access in NS by default
# only enable for aarch64