arm: mvebu: Don't call arch_cpu_init() from SPL at all

This patch removes the call to arch_cpu_init() in the SPL U-Boot version.
As SPL does not need all the configuration done in this function. And
also does not need the reconfiguration of the internal register
address to 0xf1000000. This will be done by the main U-Boot later on.

This also fixes a problem with the timer not beeing initialized on AXP,
as needed for the mdelay in the setup_usb_phys(). This will now only
be called once in main U-Boot.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fd56c99c925501113e896a7f46005ced3d642449..071b13b6a4d7ac6319fd5015b5d0a2b9dcb5d4d4 100644 (file)
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -220,9 +220,11 @@ static void setup_usb_phys(void)
        }
 }
 
+/*
+ * This function is not called from the SPL U-Boot version
+ */
 int arch_cpu_init(void)
 {
-#if !defined(CONFIG_SPL_BUILD)
        struct pl310_regs *const pl310 =
                (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
 
@@ -233,13 +235,11 @@ int arch_cpu_init(void)
         * still locked to cache.
         */
        mmu_disable();
-#endif
 
        /* Linux expects the internal registers to be at 0xf1000000 */
        writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG);
        set_cbar(SOC_REGS_PHY_BASE + 0xC000);
 
-#if !defined(CONFIG_SPL_BUILD)
        /*
         * From this stage on, the SoC detection is working. As we have
         * configured the internal register base to the value used
@@ -253,7 +253,6 @@ int arch_cpu_init(void)
        icache_disable();
        dcache_disable();
        clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
-#endif
 
        /*
         * We need to call mvebu_mbus_probe() before calling

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 2be8cbac3f4e5006306590ce28e180ed7cdc59c0..b78da25b5cf35ab6ff4b39a1d25bb3d645832bad 100644 (file)
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -33,10 +33,11 @@
 #define INTREG_BASE_ADDR_REG   (INTREG_BASE + 0x20080)
 #if defined(CONFIG_SPL_BUILD)
 /*
- * On A38x switching the regs base address without running from
- * SDRAM doesn't seem to work. So let the SPL still use the
- * default base address and switch to the new address in the
- * main u-boot later.
+ * The SPL U-Boot version still runs with the default
+ * address for the internal registers, configured by
+ * the BootROM. Only the main U-Boot version uses the
+ * new internal register base address, that also is
+ * required for the Linux kernel.
  */
 #define SOC_REGS_PHY_BASE      0xd0000000
 #else

diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 4eeef2dcdaa3dbe6291f3b527d75cbf370a668d8..832df0a0049c3b4bf1fb3be204b5baa49ae96aae 100644 (file)
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -36,19 +36,6 @@ void board_init_f(ulong dummy)
 {
        int ret;
 
-#ifndef CONFIG_MVEBU_BOOTROM_UARTBOOT
-       /*
-        * Only call arch_cpu_init() when not returning to the
-        * Marvell BootROM, which is done when booting via
-        * the xmodem protocol (kwboot tool). Otherwise the
-        * internal register will get remapped and the BootROM
-        * can't continue to run correctly.
-        */
-
-       /* Linux expects the internal registers to be at 0xf1000000 */
-       arch_cpu_init();
-#endif
-
        /*
         * Pin muxing needs to be done before UART output, since
         * on A38x the UART pins need some re-muxing for output