drm/i915: Unconditionally clear the pm/guc GT IIR upon acking

Having stored the IIR for action, we should always clear it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180802100631.31305-2-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 90628a47ae17f81312dff51ddbc89aff4af55654..e37e3ec22a7973e103cfd822ea4e4100af152645 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1534,11 +1534,8 @@ static void gen8_gt_irq_ack(struct drm_i915_private *i915,
 
        if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
                gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));
-               if (likely(gt_iir[2] & (i915->pm_rps_events |
-                                       i915->pm_guc_events)))
-                       raw_reg_write(regs, GEN8_GT_IIR(2),
-                                     gt_iir[2] & (i915->pm_rps_events |
-                                                  i915->pm_guc_events));
+               if (likely(gt_iir[2]))
+                       raw_reg_write(regs, GEN8_GT_IIR(2), gt_iir[2]);
        }
 
        if (master_ctl & GEN8_GT_VECS_IRQ) {