Revert "net/mlx5e: Allow relaxed ordering over VFs"

FW is not ready, fix was sent too soon.
This reverts commit 0931ae7694835922b31b1849b197cc14cfbf204b.

Fixes: 0931ae769483 ("net/mlx5e: Allow relaxed ordering over VFs")
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
index 68364484a435470f69338f551f5f144e3eb9d820..3c1edfa33aa79642e693c37b4eaeaa2ed4929210 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
@@ -565,7 +565,8 @@ static void mlx5e_build_rx_cq_param(struct mlx5_core_dev *mdev,
 static u8 rq_end_pad_mode(struct mlx5_core_dev *mdev, struct mlx5e_params *params)
 {
        bool lro_en = params->packet_merge.type == MLX5E_PACKET_MERGE_LRO;
-       bool ro = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
+       bool ro = pcie_relaxed_ordering_enabled(mdev->pdev) &&
+               MLX5_CAP_GEN(mdev, relaxed_ordering_write);
 
        return ro && lro_en ?
                MLX5_WQ_END_PAD_MODE_NONE : MLX5_WQ_END_PAD_MODE_ALIGN;

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
index 43a536cb81db3e9539553870bb68316d154f7e6e..c0f409c195bf8dc20a9b7433469af8397f110b1a 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
@@ -38,11 +38,12 @@
 
 void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc)
 {
+       bool ro_pci_enable = pcie_relaxed_ordering_enabled(mdev->pdev);
        bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
        bool ro_read = MLX5_CAP_GEN(mdev, relaxed_ordering_read);
 
-       MLX5_SET(mkc, mkc, relaxed_ordering_read, ro_read);
-       MLX5_SET(mkc, mkc, relaxed_ordering_write, ro_write);
+       MLX5_SET(mkc, mkc, relaxed_ordering_read, ro_pci_enable && ro_read);
+       MLX5_SET(mkc, mkc, relaxed_ordering_write, ro_pci_enable && ro_write);
 }
 
 static int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn,