]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/skl: Add variables to check x_tile and y_tile
authorMahesh Kumar <mahesh1.kumar@intel.com>
Thu, 1 Dec 2016 15:49:33 +0000 (21:19 +0530)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Wed, 7 Dec 2016 18:30:34 +0000 (16:30 -0200)
This patch adds variable to check for X_tiled & y_tiled planes, instead
of always checking against framebuffer-modifiers.

Changes:
 - Created separate patch as per Paulo's comment
 - Added x_tiled variable as well
Changes since V2:
 - Incorporate Paulo's comments
 - Rebase
Changes since V3 (from Paulo):
 - Bikeshed indentation

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161201154940.24446-2-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/intel_pm.c

index 3ea7cf275be09f72f3bd225c2404896d3b2199b4..4db68459fd1872366f9067b536b1a16e80d8af83 100644 (file)
@@ -3585,13 +3585,18 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
        struct intel_atomic_state *state =
                to_intel_atomic_state(cstate->base.state);
        bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
+       bool y_tiled, x_tiled;
 
        if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) {
                *enabled = false;
                return 0;
        }
 
-       if (apply_memory_bw_wa && fb->modifier == I915_FORMAT_MOD_X_TILED)
+       y_tiled = fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+                 fb->modifier == I915_FORMAT_MOD_Yf_TILED;
+       x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
+
+       if (apply_memory_bw_wa && x_tiled)
                latency += 15;
 
        width = drm_rect_width(&intel_pstate->base.src) >> 16;
@@ -3630,16 +3635,15 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
                y_min_scanlines *= 2;
 
        plane_bytes_per_line = width * cpp;
-       if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
-           fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+       if (y_tiled) {
                plane_blocks_per_line =
                      DIV_ROUND_UP(plane_bytes_per_line * y_min_scanlines, 512);
                plane_blocks_per_line /= y_min_scanlines;
-       } else if (fb->modifier == DRM_FORMAT_MOD_NONE) {
+       } else if (x_tiled) {
+               plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
+       } else {
                plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512)
                                        + 1;
-       } else {
-               plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
        }
 
        method1 = skl_wm_method1(plane_pixel_rate, cpp, latency);
@@ -3650,8 +3654,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 
        y_tile_minimum = plane_blocks_per_line * y_min_scanlines;
 
-       if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
-           fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+       if (y_tiled) {
                selected_result = max(method2, y_tile_minimum);
        } else {
                if ((cpp * cstate->base.adjusted_mode.crtc_htotal / 512 < 1) &&
@@ -3667,8 +3670,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
        res_lines = DIV_ROUND_UP(selected_result, plane_blocks_per_line);
 
        if (level >= 1 && level <= 7) {
-               if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
-                   fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+               if (y_tiled) {
                        res_blocks += y_tile_minimum;
                        res_lines += y_min_scanlines;
                } else {